FirstRanker Logo

FirstRanker.com - FirstRanker's Choice is a hub of Question Papers & Study Materials for B-Tech, B.E, M-Tech, MCA, M.Sc, MBBS, BDS, MBA, B.Sc, Degree, B.Sc Nursing, B-Pharmacy, D-Pharmacy, MD, Medical, Dental, Engineering students. All services of FirstRanker.com are FREE

📱

Get the MBBS Question Bank Android App

Access previous years' papers, solved question papers, notes, and more on the go!

Install From Play Store

Download VTU BE 2020 Jan Question Paper 18 Scheme 18ELIN1424 Basic Electronics First And Second Semester

Download Visvesvaraya Technological University (VTU) BE/B.Tech First And Second Semester (1st sem and 2nd sem) 2019-2020 Jan ( Bachelor of Engineering) 18 Scheme 18ELIN1424 Basic Electronics Previous Question Paper

This post was last modified on 02 March 2020

VTU B.Tech 1st Year Last 10 Years 2011-2021 Question Papers


Firstranker's choice

www.FirstRanker.com

USN

--- Content provided by‌ FirstRanker.com ---

BCS SCHEME

18ELN14/24

First/Second Semester B.E. Degree Examination, Dec.2019/Jan.2020

Basic Electronics

Time: 3 hrs.

--- Content provided by‍ FirstRanker.com ---

Max. Marks: 100

Note: Answer any FIVE full questions, choosing ONE full question from each module.

Module-1

  1. a. Explain the working of PN junction diode under forward and reverse biased conditions. (06 Marks)
  2. b. Explain the working of Photodiode. (05 Marks)
  3. --- Content provided by‍ FirstRanker.com ---

  4. c. Explain with neat circuit diagram and waveforms, the working of full wave bridge rectifier. Show that the efficiency of full wave bridge rectifier is 81%. (09 Marks)

OR

  1. a. Explain the operation of Half wave rectifier with capacitor filter with neat circuit diagram and waveforms. (06 Marks)
  2. b. A full wave rectifier uses 2 diodes having internal resistance of 10 O each. The transformer RMS secondary voltage from center to each end is 200V. Find Im and Vdc if the load is 800 O. (06 Marks)
  3. c. Explain how zener diode helps in voltage regulation with neat circuit diagram. Give detail mathematical analysis. (08 Marks)
  4. --- Content provided by⁠ FirstRanker.com ---

Module-2

  1. a. Explain the construction, working and characteristics of n-channel JFET. (09 Marks)
  2. b. With a neat circuit diagram, explain the working of CMOS Inverter. (06 Marks)
  3. c. For a n-channel JFET if IDSS = 9 mA and Vp = -6V. Calculate ID at VGS = -4V and VGS at ID = 3 mA. (05 Marks)

OR

--- Content provided by⁠ FirstRanker.com ---

  1. a. Explain the construction, working and characteristics of enhancement type MOSFET. (09 Marks)
  2. b. Explain the working of Silicon Controlled Rectifier [SCR] using two transistor model. (06 Marks)
  3. c. For an EMOSFET, determine the value of ID if ID(on) = 4 mA, VGS(on) = 6V, VT = 4V and VGS = 8V. (05 Marks)

Module-3

  1. a. What is an OP-AMP? List the characteristics of an ideal OP-AMP. (06 Marks)
  2. --- Content provided by​ FirstRanker.com ---

  3. b. Explain the operation of an OP-AMP as inverting amplifier with neat diagram and waveforms. (06 Marks)
  4. c. Explain how OP-AMP can be used as (i) Integrator (ii) Voltage follower. (08 Marks)

OR

  1. a. Explain the different input modes of an OP-AMP. (06 Marks)
  2. b. Design an adder circuit using OP-AMP to obtain an output voltage, Vo = —[2V1 + 3V2+5V3]. Assume Rf=10kO. (06 Marks)
  3. --- Content provided by​ FirstRanker.com ---

  4. c. Explain the following terms with respect to OP-AMP: (i) CMRR (ii) Slew rate (iii) Input bias current (iv) Supply Voltage Rejection ratio. (08 Marks)

Module-4

  1. a. With a neat circuit diagram, explain how transistor is used as an amplifier. Derive an equation for Av. (08 Marks)
  2. b. Explain RC phase shift oscillator with circuit diagram and necessary equations. (08 Marks)
  3. c. Explain the voltage series feedback circuit and derive an equation for voltage gain, Av, with feedback. (04 Marks)
  4. --- Content provided by‌ FirstRanker.com ---

OR

  1. a. With a neat circuit diagram, explain the working of Wein-bridge oscillator. (08 Marks)
  2. b. Explain the operation of I.C555 as an Astable oscillator with neat circuit diagram and necessary equations. (08 Marks)
  3. c. The Transistor in CE configuration is shown in Fig.Q8(c) with RC = 1 kO and ßDC = 125. Determine (i) VCE at Vin = 0 V (ii) IB(min) to saturate the collector current (iii) RB(max) when Vin = 8 V. (VCE(sat) can be neglected). (04 Marks)

Fig.Q8(c)

--- Content provided by⁠ FirstRanker.com ---

Module-5

  1. a. Design Full adder circuit and implement it using basic gates. (08 Marks)
  2. b. Find (i) (1101 0111 0110 1010)2 = ( ? )10 (ii) (EB986)16 = ( ? )2 (iii) (925.75)10 = ( ? )8 (06 Marks)
  3. c. Explain the basic elements of communication system with block diagram. (06 Marks)

OR

--- Content provided by​ FirstRanker.com ---

  1. a. State and prove De-Morgan's theorem. (06 Marks)
  2. b. With a block diagram, explain the working of a 3-bit ripple counter. (06 Marks)
  3. c. What is a Flip-flop? Explain the operation of master-slave JK flip-flop. (08 Marks)

2 of 2

www.FirstRanker.com

--- Content provided by​ FirstRanker.com ---



This download link is referred from the post: VTU B.Tech 1st Year Last 10 Years 2011-2021 Question Papers

--- Content provided by FirstRanker.com ---