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Download GTU B.Tech 2020 Winter 6th Sem 2161707 Control System Design Question Paper

Download GTU (Gujarat Technological University Ahmedabad) B.Tech/BE (Bachelor of Technology/ Bachelor of Engineering) 2020 Winter 6th Sem 2161707 Control System Design Previous Question Paper

This post was last modified on 04 March 2021

GTU B.Tech 2020 Winter Question Papers || Gujarat Technological University


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GUJARAT TECHNOLOGICAL UNIVERSITY
BE- SEMESTER-VI (NEW) EXAMINATION — WINTER 2020

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Subject Code:2161707 Date:20/01/2021
Subject Name:Control System Design
Time:02:00 PM TO 04:00 PM Total Marks: 56

Instructions:

  1. Attempt any FOUR questions out of EIGHT questions.
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  3. Make suitable assumptions wherever necessary.
  4. Figures to the right indicate full marks.

Q.1

  1. Explain cascade compensation (03 Marks)
  2. Explain phase lead compensator in detail. (04 Marks)
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  4. Explain the steps to plot the lead compensator using Root locus (07 Marks)

Q.2

  1. Explain lag compensation (03 Marks)
  2. Explain Deadbeat response (04 Marks)
  3. Explain the steps for plotting phase lag compensator using bode plot (07 Marks)
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Q.3

  1. Explain Prefilter design (03 Marks)
  2. Explain the state space model of RLC series circuit (04 Marks)
  3. Explain Full State feedback controller in detail. (07 Marks)

Q.4

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  1. Explain controllability (03 Marks)
  2. Explain Observable canonical form (04 Marks)
  3. Explain Robust PID controller in detail. (07 Marks)

Q.5

  1. Explain Observability (03 Marks)
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  3. Explain Internal Model design (04 Marks)
  4. Explain state feedback observer technique in detail. (07 Marks)

Q.6

  1. Explain the concept of positive and negative semi-definite (03 Marks)
  2. Explain Lyapunov Stability Criteria in detail. (04 Marks)
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  4. Explain LQR controller (07 Marks)

Q.7

  1. Explain considerations that need to be taken in designing robust controller (03 Marks)
  2. Explain diagonal canonical form (04 Marks)
  3. Explain optimal controller. (07 Marks)
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Q.8

  1. Explain Riccatti Equation (03 Marks)
  2. Explain the state space model of DC motor plant (04 Marks)
  3. Explain steps to design phase lead-lag compensation using root locus method. (07 Marks)

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