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Download PTU B-Tech EEE 2020 Dec 3rd Sem 72164 Digital Electronics Question Paper

Download PTU (I.K.Gujral Punjab Technical University (IKGPTU)) B-Tech (Bachelor of Technology) (EEE)- Electrical And Electronics Engineering 2020 December 3rd Sem 72164 Digital Electronics Previous Question Paper

This post was last modified on 13 February 2021

PTU B.Tech Question Papers 2020 December (All Branches)


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Roll No. [ ] Total No. of Pages : 02
Total No. of Questions : 18

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B.Tech. (EE) PT (Sem.-3)
DIGITAL ELECTRONICS
Subject Code : BTEE-404
M.Code : 72164
Time : 3 Hrs. Max. Marks : 60

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INSTRUCTIONS TO CANDIDATES :

  1. SECTION-A is COMPULSORY consisting of TEN questions carrying TWO marks each.
  2. SECTION-B contains FIVE questions carrying FIVE marks each and students have to attempt any FOUR questions.
  3. SECTION-C contains THREE questions carrying TEN marks each and students have to attempt any TWO questions.

SECTION-A

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Answer briefly :

  1. How a negative number is accounted in digital system?
  2. Draw a full subtractor using NAND Gate.
  3. Draw the logic circuit for the expression AB+ ABC
  4. Write down the applications of D flip-flop.
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  6. Compare ECL and TTL circuits.
  7. Draw the logic diagram for the logic function Z = (A+B).C
  8. Write down the characteristic table of D Flip-flop.
  9. List the differences between decoder and multiplexer.
  10. What do you understand from the term digital counter? How it differs from register?
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  12. What is programmable logic array? How it differs from ROM?

SECTION-B

  1. Simplify the Boolean function F(w, x,y,z) = S (1, 3, 7, 11, 15), which has the don’t-care conditions d(w, x, y, z) = S (0, 2, 5).
  2. Discuss the working of a 4-bit Johnson counter. Also convert SR into JK and D flip-flop.
  3. Define the terms resolution and accuracy in context of A/D converter. Also explain the working of parallel A/D converter.
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  5. What do you understand by the term programmable logic arrays? Classify and explain different types of memories.
  6. Design a 3-bit synchronous down counter using j-k flip flops.

SECTION-C

  1. Discuss methods of data representations in VHDL. Also explain decision-controlled structure.
  2. Design an ECL NOR gate and explain its operation in details. Also compare the performance of static and dynamic memories in details.
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  4. Write a short notes on :
    1. Quine McClusky method
    2. HDL format and syntax

NOTE : Disclosure of Identity by writing Mobile No. or Making of passing request on any page of Answer Sheet will lead to UMC against the Student.

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This download link is referred from the post: PTU B.Tech Question Papers 2020 December (All Branches)

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