Download PTU B-Tech CSE-IT 2020 Dec 3rd Sem 56593 Digital Circuits And Logic Design Question Paper

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B.Tech.(CSE)/(IT) (2012 to 2017) (Sem.-3)
DIGITAL CIRCUITS & LOGIC DESIGN
Subject Code : BTCS-303
M.Code : 56593

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INSTRUCTIONS TO CANDIDATES :

1. SECTION-A is COMPULSORY consisting of TEN questions carrying TWO marks each.
2. SECTION-B contains FIVE questions carrying FIVE marks each and students have to attempt any FOUR questions.
3. SECTION-C contains THREE questions carrying TEN marks each and students have to attempt any TWO questions.

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SECTION-A

Write Briefly :

1. Convert a D flip flop into T flip flop
2. Design a 4:1 MUX
3. Parity Checker

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4. MOSFET RAM
5. Function of Multivibrator
6. RTL versus DCTL
7. Convert 11001 to decimal
8. What is resolution in A/D Converter?

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9. Find the state diagram to design a sequence detector circuit, which detects three or more consecutive 1’s in a string of bits coming through an input line.
10. EEPROM

SECTION-B

11. Design full subtractor using De-Multiplexer.
12. Using Boolean algebra show that :
    

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    AB+ AC +BC=AB+ AC
13. Explain the structure of typical RAM cell.
14. Draw and explain logic diagram of a mod-8 ripple counter using three JK flipflops.
15. What is difference in 1’s and 2’s Complement? Which of two is better to represent negative numbers? Why?

SECTION-C

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16. What are the different A/D and D/A conversion techniques? Explain in detail.
17. What do you understand by Boolean expressions and need of their minimization? Elaborate SOP and POS.
18. a. Draw a truth table for 4-input ‘OR’ Gate and 3-input ‘NAND’ Gate
    b. Define Interfacing and show the interfacing of two TTL gates. Also discuss their characteristics.

NOTE : Disclosure of Identity by writing Mobile No. or Making of passing request on any page of Answer Sheet will lead to UMC against the Student.

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