Download GTU BE/B.Tech 2019 Summer 3rd Sem New 2130305 Analog Circuits I Question Paper

Download GTU (Gujarat Technological University) BE/BTech (Bachelor of Engineering / Bachelor of Technology) 2019 Summer 3rd Sem New 2130305 Analog Circuits I Previous Question Paper

1
Seat No.: ________ Enrolment No.___________

GUJARAT TECHNOLOGICAL UNIVERSITY

BE - SEMESTER ?III (NEW) EXAMINATION ? SUMMER 2019
Subject Code: 2130305 Date: 11/06/2019

Subject Name:Analog Circuits-I

Time: 02:30 PM TO 05:00 PM Total Marks: 70

Instructions:

1. Attempt all questions.

2. Make suitable assumptions wherever necessary.

3. Figures to the right indicate full marks.

MARKS

Q.1 (a) Enlist the ideal characteristics of Op Amp. 03
(b) Draw the differential amplifier with one op amp and derive equation of
gain.
04
(c) What is input offset voltage? Explain offset-voltage compensating network
design.
07

Q.2 (a) What is CMRR and SVRR? 03
(b) Explain I to V converter with necessary circuit and equations. 04
(c)

For inverting amplifier shown in above figure, determine the maximum
possible output offset voltage due to 1. Input offset voltage, 2. Input bias
current.
What value of ROM is needed to reduce the effect of input bias current?
07
OR
(c) What is the effect of negative feedback on Op Amp? Discuss various type
of feedback.
07
Q.3 (a) Discuss the ideal diode and it?s the second approximation,. 03
(b) Draw the circuit of summing amplifier and derive equation of gain. 04
(c) Draw the circuit of Integrator and Explain its frequency response. 07
OR
Q.3 (a) Draw the circuit of negative clampers and negative clipper. 03
(b) Compare full wave and bridge rectifier. 04
(c) Draw the circuit of instrumentation amplifier and derive equation of gain. 07
Q.4 (a) Draw a circuit of non-inverting amplifier with gain of 11. 03
(b) Explain voltage divider bias of a BJT circuit. 04
(c) Explain the circuit of peak detector. 07





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1
Seat No.: ________ Enrolment No.___________

GUJARAT TECHNOLOGICAL UNIVERSITY

BE - SEMESTER ?III (NEW) EXAMINATION ? SUMMER 2019
Subject Code: 2130305 Date: 11/06/2019

Subject Name:Analog Circuits-I

Time: 02:30 PM TO 05:00 PM Total Marks: 70

Instructions:

1. Attempt all questions.

2. Make suitable assumptions wherever necessary.

3. Figures to the right indicate full marks.

MARKS

Q.1 (a) Enlist the ideal characteristics of Op Amp. 03
(b) Draw the differential amplifier with one op amp and derive equation of
gain.
04
(c) What is input offset voltage? Explain offset-voltage compensating network
design.
07

Q.2 (a) What is CMRR and SVRR? 03
(b) Explain I to V converter with necessary circuit and equations. 04
(c)

For inverting amplifier shown in above figure, determine the maximum
possible output offset voltage due to 1. Input offset voltage, 2. Input bias
current.
What value of ROM is needed to reduce the effect of input bias current?
07
OR
(c) What is the effect of negative feedback on Op Amp? Discuss various type
of feedback.
07
Q.3 (a) Discuss the ideal diode and it?s the second approximation,. 03
(b) Draw the circuit of summing amplifier and derive equation of gain. 04
(c) Draw the circuit of Integrator and Explain its frequency response. 07
OR
Q.3 (a) Draw the circuit of negative clampers and negative clipper. 03
(b) Compare full wave and bridge rectifier. 04
(c) Draw the circuit of instrumentation amplifier and derive equation of gain. 07
Q.4 (a) Draw a circuit of non-inverting amplifier with gain of 11. 03
(b) Explain voltage divider bias of a BJT circuit. 04
(c) Explain the circuit of peak detector. 07





2

OR
Q.4 (a) Give basic difference between BJT and FET. 03
(b) Draw and explain detail construction of D MOSFET. 04
(c) Explain Transistor as a switch with necessary circuit and equations. 07
Q.5 (a) Draw the circuit of op-amp based Zero crossing detector with suitable input
output waveform.
03
(b) Draw and explain VI characteristics of PN junction diode. 04
(c) Explain JFET based amplifier. 07
OR

Q.5 (a) Explain basic principle of Oscillator. 03
(b) Draw the circuit of Schmitt trigger and explain its working. 04
(c) Design a Wein bridge oscillator of 965 Hz. 07

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This post was last modified on 20 February 2020