Download AKTU B-Tech 6th Sem 2015-2016 NEC 603 Integrated Circuit Technology Question Paper

Download AKTU (Dr. A.P.J. Abdul Kalam Technical University (AKTU), formerly Uttar Pradesh Technical University (UPTU) B-Tech 6th Semester (Sixth Semester) 2015-2016 NEC 603 Integrated Circuit Technology Question Paper

Printed Pages: 4 NEC-603
(Following Paper ID and Roll No. to be ?lled in your
Answer Books)
RollNoLllTlTllll
B. TECH.
Theory Examination (Semester-VI) 2015-16
INTEGRATED CIRCUIT TECHNOLOGY
Time : 3 Hours Max. Marks : 100
Section-A
Q1. Attempt all parts. All parts carry equal marks. Write
I answer of each part in short. (2X10=20)
(a) List the basic process for IC fabrication.
(b) Explain the purpose of oxidation.
(c) Compare proximity printing and projection printing.
(d) What are plasma deposition reactors? Why and how
these are used?
(c) What are the widely used materials for ?lm deposi-
tion.
(0 Explain photomask and photoresist.
(1) , P.T.O.
2005/443/371/6775 r . =

Q2.
(g)
(h)
(i)
(D
What are the factors effecting the etch rate?
What is auto doping in growth process?
Mention the advantages of Integrated circuits.
Why aluminium is preferred for metallization.
Section-B
Attempt any ?ve questions from this section. (10X5=50)
(a)
(b)
(C)
(i) What is Fick?s law of diffusion? Boron is diffused
into an n-type single crystal substrate with doping
cone. of 1015 atm/cm3. Assume di?'usion ?mction to
be Gaussian, if diffusion time is 1hr, surface
conc.=l X10?3/cm3 and depth of junction is 2pm,
determine di?usivity.
(ii) Explain ion implantation and mention its advan-
tages over diffusion.
Why oxidation is done? Explain the chemistry and
kinetics of growth using Deal Groves Model.
(1) What is latch up? How htch up is avoided in CMOS
technology?
(i1) Describe ?Dopant Pro?les? in bn'ef.
(2)
2005/446/271/6775
(d)
(e)
(f)
(g)
(h)
Attempt any two questions.
De?ne thin ?lm. Describe the vacuum evaporation tech-
nique for deposition of thin ?lms used in integrated cir-
cuit technology.
(i) What is epitaxial growth? What are the advantages
of epitaxial process over diffusion and Czochralski
process.
(it) De?ne sheet resistance. Describe a method for its
measurement.
Explain molecular beam epitaxy in detail. What are its
advantages over VPE?
What are the effects of nesting tolerance on MOSFET
layout? Discuss and describe with the help of suit-
able diagrams.
Discuss and describe the various process design
considerations of VLSI devices.
Section-C
(2X15=30)
Q3. (a) What do you mean by Sputtering? Explain Sputter-
ing Yield. Draw the schematic diagram of signal
parallel?plate sputtering system and its working.
(3) P.T.O.
2005/446/271/6775

(b) Explain why sputtering is needed for the deposition of
re??actory materials like tantalum
Q4. (a) Discuss di?izsion. Find dif?Jsion constants for :
(i) Interstitial di?hsion
(ii) Substitutional di?ilsion
(b) Give reasons and explain why NPN- transistors are pre-
ferred over PNP counterparts
Q5. Write short notes on following :
(a) MOS IC fabrication technique
(b) Czochralski Process
(c) CVD process
(4)
2005/446/271/6775