Download JNTUA M.Tech 1st Sem 2017 Feb 9D06103 Advanced Computer Architecture Question Paper

Download JNTUA (JNTU Anantapur) M.Tech ( Master of Technology) 1st Semester 2017 Feb 9D06103 Advanced Computer Architecture Previous Question Paper

Code: 9D06103

M.Tech I Semester Regular & Supplementary Examinations January/February 2017
ADVANCED COMPUTER ARCHITECTURE
(Common to DSCE, DECS & ES)

Time: 3 hours Max. Marks: 60
Answer any FIVE questions
All questions carry equal marks
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1 (a) What are the four implementation technology trends for implementing computer? Compare these four
technologies.
(b) Find number of dies per 30 cm wafer for a die that is 0.7 cm on a side.
(c) An enhancement to the processor of a server system used for web serving such that the new CPU is 10 times
faster on computation in the web serving application than the original processor. Assuming that the original CPU
is busy with computation 40% of the time and is waiting for I/O 60% of the time, what is the overall speedup
gained by incorporating the enhancement?

2 (a) List out the various addressing modes used for signal processing with example, meaning and usage.
(b) Explain the various control flow instructions with an example of each.

3 (a) Describe the basic structure of a MIPS floating point unit using Tomasulo?s algorithm.
(b) Describe about the five levels of branch prediction.

4 (a) Show how the process of optimizing the loop overhead by unrolling the loop actually eliminates data
dependences.
(b) Consider a loop like this one:



}
What are the dependences between S1 and S2? Is this loop parallel? If not, show how to make it parallel.

5 (a) Assume a fully associative write back cache with many cache entries that starts empty. Below is a sequence of
five memory operations (the addresses in parentheses):
Write Mem[100];
Write Mem[100];
Read Mem[200]
Write Mem[200];
Write Mem[100];
What are the number of hits and misses with using no-write allocate versus write allocate?
(b) Describe in detail about the mapping of an alpha virtual address.

6 (a) Draw the state transition diagram for an individual cache block in a directory based system.
(b) Explain directory-based cache-coherence protocols with necessary transition diagram.

7 (a) Suppose an I/O system with a single disk gets on an average 50 I/O requests per second. Assume the average
time for a disk to service an I/O request is 10 ms. What is the utilization of the I/O system?
(b) Describe about transaction processing bench mark.

8 (a) Describe in detail about storage area network.
(b) Write short note on various transmission medium used for inter connecting networks.

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