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Download DU (University of Delhi) B-Tech 6th Semester 2341601 Microprocessors Question Paper

Download DU (University of Delhi) B-Tech (Bachelor of Technology) 6th Semester 2341601 Microprocessors Question Paper

This post was last modified on 31 January 2020

This download link is referred from the post: DU B-Tech Last 10 Years 2010-2020 Previous Question Papers (University of Delhi)


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No of Question Paper

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Unique Paper Code: 3241601

Name of the Paper: Microprocessor

Name of the Course:

Semester:

Unique paper Code: 12341601

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Duration of Examination: Three Hours

Maximum Marks: 75 Marks

Instructions for the Candidates

  • Attempt all questions from Section A.
  • Attempt any four questions from Section B.
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  • Attempt all parts of a question together.

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Section A

  1. (a) Which is more efficient MOV with an offset or LEA instruction? Justify. 3
    (b) In the real mode, determine the starting and ending address of the memory segment if the segment register holds the value 2355H. 3

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    (c) What does the instruction LODSW do? 3
    (d) How many bytes of memory store a far direct jump instruction? What is stored in each of the bytes? 3
    (e) What is wrong with the instruction MOV DS, SS? 3
    (f) List the flag bits tested by the conditional jump instructions. 3
    (g) Differentiate between software and hardware interrupts. 3

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    (h) Evaluate the address lines and data lines required to map 128K x 8 memory. 3
    (i) What is the purpose of the CE pin on a memory device? 3
    (j) Design a Control Word for 82C55 to set Port A as Output Port, Port B as Input Port in Mode 1 operation. 3
    (k) The instruction MOV [5000H], BX is used to access a peripheral. Comment on the kind of peripheral and the width of its data lines. 3
    (l) Which microprocessor pin and its status forces it to come out from the wait state? 2
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Section B

  1. (a) For a Core2 descriptor that contains a base address of 01000000H, a limit of OFFFFH, and G=0, what starting and ending locations are addressed by this descriptor? 4
    (b) Explain with example the instruction LSS BX, [DI]. 4
    (c) Which register or registers are used as an offset address for the string instruction destination in the microprocessor? 2
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  1. (a) Identify the addressing mode of each of the following instructions: 4
    1. MOV AL, [5534H]
    2. MOV AX, [BX]
    3. MOV ECX, [SHBX + 200H]
    4. MOV DX, [EBX + 4*ECX +1000H]
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    (b) What is the difference between an intersegment and intrasegment jump? 4
    If a near jump uses a signed 16-bit displacement, how can it jump to any memory location within the current code segment?
    (c) What is the difference between register addressing mode and direct addressing mode? 2
  2. (a) Explain the instructions XLAT and MOVSX with example. 4
    (b) Describe the operations of PUSHA. Let the current value of SP=2000H. 4

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    What will be the value of SP after the PUSHA instruction is executed?
    (c) Which flag bit is tested by the JB instruction? 2
  3. (a) Explain and sketch the WRITE operation with the help of bus timing cycle. 4
    (b) How is memory interfacing different for 8086 and 8088 systems? 4
    (c) A 30MHz crystal is attached to the 8284A clock generator, what is the operating frequency of the 8086 microprocessor? 2
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  5. (a) Design a decoder circuit to map F6000-F7FFF on 8K x 8 memory. 4
    (b) Write the control word of the 8254 interval timer to configure counter 2 in mode 2 to count LSB only in BCD. 4
    (c) Write the 8086 instruction/s to read 8 bit data from the port with address 3250H. 2
  6. (a) Define the term interrupt. Why should an interrupt vector have 4 bytes in real mode of memory addressing? 4
    (b) Explain three software commands that are used to control the operation of the 8237 DMA controller. 4

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    (c) How is a hardware interrupt requested? 2

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This download link is referred from the post: DU B-Tech Last 10 Years 2010-2020 Previous Question Papers (University of Delhi)