Download PTU BCA 2020 March 2nd Sem BSBC 204 Computer System Architecture Question Paper

Download PTU (I.K. Gujral Punjab Technical University Jalandhar (IKGPTU) BCA 2020 March (Bachelor of Computer Application) 2nd Sem BSBC 204 Computer System Architecture Previous Question Paper

1 | M- 10053 (S3)-2000

Roll No. Total No. of Pages : 02
Total No. of Questions : 07
BCA (2014 to 2018) (Sem.?2)
COMPUTER SYSTEM ARCHITECTURE
Subject Code : BSBC-204
M.Code : 10053
Time : 3 Hrs. Max. Marks : 60
INSTRUCTION TO CANDIDATES :
1. SECTION-A is COMPULSORY consisting of TEN questions carrying TWO marks
each.
2. SECTION-B contains SIX questions carrying TEN marks each and a student has
to attempt any FOUR questions.

SECTION-A
1) Answer briefly :
a) What is Von Neumann Architecture?
b) What are the major differences between CPU and peripheral devices?
c) Briefly explain the instruction cycle.
d) Distinguish between Hardwired and Micro-programmed control.
e) What do you mean by a zero address instruction?
f) What is Input-output Interface?
g) What is the difference between logical and physical addresses?
h) What is IOP?
i) Why does DMA have priority over the CPU when both request a memory transfer?
j) What is cache coherence? Why does it occur?
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1 | M- 10053 (S3)-2000

Roll No. Total No. of Pages : 02
Total No. of Questions : 07
BCA (2014 to 2018) (Sem.?2)
COMPUTER SYSTEM ARCHITECTURE
Subject Code : BSBC-204
M.Code : 10053
Time : 3 Hrs. Max. Marks : 60
INSTRUCTION TO CANDIDATES :
1. SECTION-A is COMPULSORY consisting of TEN questions carrying TWO marks
each.
2. SECTION-B contains SIX questions carrying TEN marks each and a student has
to attempt any FOUR questions.

SECTION-A
1) Answer briefly :
a) What is Von Neumann Architecture?
b) What are the major differences between CPU and peripheral devices?
c) Briefly explain the instruction cycle.
d) Distinguish between Hardwired and Micro-programmed control.
e) What do you mean by a zero address instruction?
f) What is Input-output Interface?
g) What is the difference between logical and physical addresses?
h) What is IOP?
i) Why does DMA have priority over the CPU when both request a memory transfer?
j) What is cache coherence? Why does it occur?
2 | M- 10053 (S3)-2000

SECTION-B
2. Discuss in detail the organization of a basic computer.
3. Explain the various instruction formats with the help of suitable examples.
4. Explain the various addressing modes available for executing instructions.
5. What are the various data transfer schemes? Briefly discuss each scheme.
6. What do you mean by Asynchronous data transfer? What are the methods of achieving
asynchronous data transfer? Explain.
7. What do you mean by memory organization? Discuss in detail about cache memory.












NOTE : Disclosure of Identity by writing Mobile No. or Making of passing request on any
page of Answer Sheet will lead to UMC against the Student.
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