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Download JNTUH MCA 1st Sem R15 2020 January 821AB Computer Organization Question Paper

Download JNTUH (Jawaharlal nehru technological university) MCA (Master of Computer Applications) 1st Sem (First Semester) Regulation-R15 2020 January 821AB Computer Organization Previous Question Paper

This post was last modified on 16 March 2023

JNTUH MCA 1st Sem Last 10 Years 2023-2013 Question Papers R20-R09 || Jawaharlal nehru technological university


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Code No: 821AB R15

JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD

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MCA I Semester Examinations, January - 2020

COMPUTER ORGANIZATION

Time: 3hrs Max.Marks:75

Note: This question paper contains two parts A and B.

Part A is compulsory which carries 25 marks. Answer all questions in Part A. Part B consists of 5 Units. Answer any one full question from each unit. Each question carries 10 marks and may have a, b, c as sub questions.

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PART - A 5 x 5 Marks =25

  1. a) Convert the decimal number 5647 to 1) BCD ii)Excess-3 code. 5
  2. b) What is locality of reference? 5
  3. c) Discuss the function of instruction queue in 8086. 5
  4. d) What is the need for DMA transfer? 5
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  6. e) What are instruction hazards? 5

PART -B 5 x 10 Marks =50

  1. Simplify the Boolean expression using K-MAP F(A,B,C,D) = Sm(1,2,3,8,9,10,11,14) +d(7,15). [10]
    OR
  2. Design the combinational circuit of Binary to Excess-3 code convertor. [10]
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  4. Discuss about direct and set-associative mapping with examples. [10]
    OR
  5. A two way set associative cache memory uses blocks of four words. The cache can accommodate a total of 2048 words from the main memory. The main memory size is 128 K*32.
    1. Formulate all pertinent information required to construct the cache memory.
    2. What is the size of the cache memory? [10]
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  7. Explain in detail the register organization of 8086. [10]
    OR
  8. Write an assembly language program to concatenate two strings. [10]
  9. Describe in detail about IOP Organization. [10]
    OR
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    1. Discuss the differences between subroutine and interrupt service routines.
    2. Discuss the design of a typical input or output interface. [10]
    1. Describe in detail about pipeline processing.
    2. Explain in detail about data hazards. [10]
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    OR
  11. Describe the architecture of a shared memory multiprocessor. [10]


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