GUJARAT TECHNOLOGICAL UNIVERSITY
BE - SEMESTER-III (Old) EXAMINATION - WINTER 2019
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Subject Code: 130701 Date: 26/11/2019Subject Name: Digital Logic Design
Time: 02:30 PM TO 05:00 PM Total Marks: 70
Instructions:
- Attempt all questions.
- Make suitable assumptions wherever necessary.
- Figures to the right indicate full marks.
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Q.1 (a) Convert following Decimal Number to Hex, Binary and octal Number.
1) 157.786 2) 937.125
(b) Justify the statement: “NAND and NOR gates are universal gates.”
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Q.2 (a) Expand A+BC’+ABD’+ABCD to minterm and maxterm.
(b) Obtain the simplified expressions in SOP for the following Boolean function using K-Map method. And implement it using NAND gate.
F(A,B,C,D) = ABC+AB’C+BCD’+A’CD
OR
(b) Simplify the following Boolean function by means of the tabulation method and implement it using NAND gate. F(A,B,C,D) = £(0,1,4,7,13,14) +d(5,8,15)
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Q.3 (a) Design a 1:16 demultiplexer using 1:8 demultiplexer.
(b) Draw a truth table and logic circuit to realize the following Boolean function using multiplexer. F(A,B,C,.D)=XZ (0, 1, 3,6, 8, 10, 12, 15)
OR
Q.3 (a) With neat logic diagram, explain Universal shift register.
(b) Design 4-bit BCD adder using two 4-bit binary parallel adders.
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Q.4 (a) Draw the characteristics and excitation table of JK flip flop. Design Conversion circuit of JK Flip flop to SR Flip flop.
(b) Design 3-bit binary synchronous counter using JK Flip Flop.
OR
Q.4 (a) Define following parameters related to logic family and Compare all the logic families based on these parameters :(i) Propagation Delay (ii) Fan-out (iii) Fan-in (iv) Noise margin.
(b) Draw the state-diagram of BCD ripple counter, develop it’s logic diagram and explain the operation of circuit.
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Q.5 (a) Draw the block diagram of a processor unit with control variables and explain its operation.
(b) Discuss the differences between hard wired control & micro program control. State their merits and demerits.
OR
Q.5 (a) Explain Register transfer micro operation and arithmetic micro operation.
(b) Explain bus organization for four processor register and ALU connected through common buses.
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