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Download GTU BE/B.Tech 2019 Winter 6th Sem New 2161102 Advanced Microprocessor Question Paper

Download GTU (Gujarat Technological University) BE/BTech (Bachelor of Engineering / Bachelor of Technology) 2019 Winter 6th Sem New 2161102 Advanced Microprocessor Previous Question Paper

This post was last modified on 20 February 2020

GTU BE/B.Tech 2019 Winter Question Papers || Gujarat Technological University


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Seat No.: Enrolment No.

GUJARAT TECHNOLOGICAL UNIVERSITY

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BE - SEMESTER- VI (New) EXAMINATION - WINTER 2019
Subject Code: 2161102 Date: 09/12/2019
Subject Name: Advanced Microprocessor
Time: 02:30 PM TO 05:00 PM Total Marks: 70

Instructions:

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  1. Attempt all questions.
  2. Make suitable assumptions wherever necessary.
  3. Figures to the right indicate full marks.

Q1 (a) Explain difference between Harvard & Von-Neumann Architecture. [3]

(b) Explain CPSR Register. [4]

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(c) Draw and explain ARM development tool. [7]

Q2 (a) Describe Software Interrupt instruction with example. [3]

(b) Explain STACK related instructions. [4]

(c) Write a note on RISC Design Philosophy. List the features rejected from RISC Design for improved ARM/Design. [7]

OR

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(c) Explain following ARM-instruction with example: [7]
1) RSB 2)CMN 3)LDR 4)BGT 5)UMULL 6)EORS 7)SWAPB

Q3 (a) Write a note on Arithmetic operators in C language. [3]

(b) Write a C program to toggle led which is connected to pin 30 of LPC 2148 [4]

(c) List the properties of Thumb Instruction Set. Write a note on Thumb Implementation [7]

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OR

Q3 (a) Define delayed branch. [3]

(b) What is conditional execution? What are the mnemonics extension codes used for conditional execution? Explain with example [4]

(c) Draw interfacing diagram of one CA seven segment on port 0.0 to 0.7. [7]
Write a C program to display A to F with some time delay.

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Q4 (a) Explain exception handling in ARM processor. [3]

(b) What is Memory Management Unit (MMU)? In which circumstances the processor architecture include MMU in the design? [4]

(c) Describe the operating modes in ARM processor. [7]

OR

Q4 (a) Describe ARM optimization techniques. [3]

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(b) Write a note on virtual memory. [4]

(c) Write a short note on instruction set design. [7]

Q5 (a) Describe the concept of Multitasking. [3]

(b) Define cache memory. Explain the importance of cache memory. [4]

(c) Explain shift instruction with example. [7]

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OR

Q5 (a) Write a difference between ARM instruction set and thumb instruction set. [3]

(b) Draw and explain interfacing Diagram of relay with LPC 2148. [4]

(c) Compare AHB, ASB & APB buses of AMBA Bus system of ARM 7 Architecture. [7]


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