Download GTU (Gujarat Technological University) BE/BTech (Bachelor of Engineering / Bachelor of Technology) 2019 Summer 3rd Sem New 2131006 Electronic Devices And Circuits Previous Question Paper
Seat No.: ________ Enrolment No.___________
GUJARAT TECHNOLOGICAL UNIVERSITY
BE - SEMESTER ?III (NEW) EXAMINATION ? SUMMER 2019
Subject Code: 2131006 Date: 07/06/2019
Subject Name: Electronic Devices and Circuits
Time: 02:30 PM TO 05:00 PM Total Marks: 70
Instructions:
1. Attempt all questions.
2. Make suitable assumptions wherever necessary.
3. Figures to the right indicate full marks.
MARKS
Q.1 (a) Define
i) an intrinsic material,
ii) a negative temperature coefficient, and
iii) covalent bonding.
03
(b) What names are applied to the two types of BJT transistors? Sketch the
basic construction of each and label the various minority and majority
carriers in each. Draw the graphic symbol next to each. Is any of this
information altered by changing from a silicon to a germanium base?
04
(c) What is the major difference between a bipolar and a unipolar device?
Draw the basic construction of a p-channel JFET. Apply the proper
biasing between drain and source and sketch the depletion region for
V GS = 0 V.
07
Q.2 (a) Determine V0 and ID for the networks of figure given below
03
(b) A feedback amplifier has a gain of 1000 without feedback. Find the gain
with feedback and the amount of feedback in dB for a negative feedback
of 10%.
04
(c) A full-wave bridge rectifier with a 220 V rms sinusoidal input has a load
resistor of 10 k?. Assuming silicon diodes, calculate
(a) dc output voltage and dc load current
(b) peak output voltage and peak load current
(c) peak and average diode currents
(d) power rating of each diode
(e) PIV across each diode
07
OR
(c) Design a clamper to perform the function indicated as show figure
below.
07
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1
Seat No.: ________ Enrolment No.___________
GUJARAT TECHNOLOGICAL UNIVERSITY
BE - SEMESTER ?III (NEW) EXAMINATION ? SUMMER 2019
Subject Code: 2131006 Date: 07/06/2019
Subject Name: Electronic Devices and Circuits
Time: 02:30 PM TO 05:00 PM Total Marks: 70
Instructions:
1. Attempt all questions.
2. Make suitable assumptions wherever necessary.
3. Figures to the right indicate full marks.
MARKS
Q.1 (a) Define
i) an intrinsic material,
ii) a negative temperature coefficient, and
iii) covalent bonding.
03
(b) What names are applied to the two types of BJT transistors? Sketch the
basic construction of each and label the various minority and majority
carriers in each. Draw the graphic symbol next to each. Is any of this
information altered by changing from a silicon to a germanium base?
04
(c) What is the major difference between a bipolar and a unipolar device?
Draw the basic construction of a p-channel JFET. Apply the proper
biasing between drain and source and sketch the depletion region for
V GS = 0 V.
07
Q.2 (a) Determine V0 and ID for the networks of figure given below
03
(b) A feedback amplifier has a gain of 1000 without feedback. Find the gain
with feedback and the amount of feedback in dB for a negative feedback
of 10%.
04
(c) A full-wave bridge rectifier with a 220 V rms sinusoidal input has a load
resistor of 10 k?. Assuming silicon diodes, calculate
(a) dc output voltage and dc load current
(b) peak output voltage and peak load current
(c) peak and average diode currents
(d) power rating of each diode
(e) PIV across each diode
07
OR
(c) Design a clamper to perform the function indicated as show figure
below.
07
2
Q.3 (a) For npn transistor, which of the transistor currents is always the largest?
Which is always the smallest? Which two currents are relatively close
in magnitude?
03
(b) For Zenor diode
(i) draw schematic symbol with label,
(ii) draw characteristic with all notation,
(iii) list any two application.
04
(c) For the fixed-bias circuit shown, determine
(i) Collector current, IC
(ii) Collector resistance, RC
(iii) Base resistance, RB
(iv) VCE.
Assume ? = 80 and VBE = 0.7 V.
07
OR
Q.3 (a) Draw Ebers-Moll model and ?-model of a transistor. 03
(b) Describe what coupling and bypass capacitors are supposed to do in
amplifier circuit.
04
(c) Calculate the divider current, base voltage, emitter voltage, emitter
current, collector voltage, and collector-emitter voltage for an npn
voltage-divider bias circuit.
07
Q.4 (a) Describe the purpose of cascading CE and CC amplifiers. 03
(b) List the advantages of negative feedback. 04
(c) Explain how the swamped amplifier works and list three of its
advantages.
07
OR
Q.4 (a) State the advantaged of a Darlington transistor. 03
(b) Describe the difference between n-type and p-type semiconductor
materials.
04
(c) Determine the quiescent levels of ICQ and VCEQ for the network of Figure
given below.
07
FirstRanker.com - FirstRanker's Choice
1
Seat No.: ________ Enrolment No.___________
GUJARAT TECHNOLOGICAL UNIVERSITY
BE - SEMESTER ?III (NEW) EXAMINATION ? SUMMER 2019
Subject Code: 2131006 Date: 07/06/2019
Subject Name: Electronic Devices and Circuits
Time: 02:30 PM TO 05:00 PM Total Marks: 70
Instructions:
1. Attempt all questions.
2. Make suitable assumptions wherever necessary.
3. Figures to the right indicate full marks.
MARKS
Q.1 (a) Define
i) an intrinsic material,
ii) a negative temperature coefficient, and
iii) covalent bonding.
03
(b) What names are applied to the two types of BJT transistors? Sketch the
basic construction of each and label the various minority and majority
carriers in each. Draw the graphic symbol next to each. Is any of this
information altered by changing from a silicon to a germanium base?
04
(c) What is the major difference between a bipolar and a unipolar device?
Draw the basic construction of a p-channel JFET. Apply the proper
biasing between drain and source and sketch the depletion region for
V GS = 0 V.
07
Q.2 (a) Determine V0 and ID for the networks of figure given below
03
(b) A feedback amplifier has a gain of 1000 without feedback. Find the gain
with feedback and the amount of feedback in dB for a negative feedback
of 10%.
04
(c) A full-wave bridge rectifier with a 220 V rms sinusoidal input has a load
resistor of 10 k?. Assuming silicon diodes, calculate
(a) dc output voltage and dc load current
(b) peak output voltage and peak load current
(c) peak and average diode currents
(d) power rating of each diode
(e) PIV across each diode
07
OR
(c) Design a clamper to perform the function indicated as show figure
below.
07
2
Q.3 (a) For npn transistor, which of the transistor currents is always the largest?
Which is always the smallest? Which two currents are relatively close
in magnitude?
03
(b) For Zenor diode
(i) draw schematic symbol with label,
(ii) draw characteristic with all notation,
(iii) list any two application.
04
(c) For the fixed-bias circuit shown, determine
(i) Collector current, IC
(ii) Collector resistance, RC
(iii) Base resistance, RB
(iv) VCE.
Assume ? = 80 and VBE = 0.7 V.
07
OR
Q.3 (a) Draw Ebers-Moll model and ?-model of a transistor. 03
(b) Describe what coupling and bypass capacitors are supposed to do in
amplifier circuit.
04
(c) Calculate the divider current, base voltage, emitter voltage, emitter
current, collector voltage, and collector-emitter voltage for an npn
voltage-divider bias circuit.
07
Q.4 (a) Describe the purpose of cascading CE and CC amplifiers. 03
(b) List the advantages of negative feedback. 04
(c) Explain how the swamped amplifier works and list three of its
advantages.
07
OR
Q.4 (a) State the advantaged of a Darlington transistor. 03
(b) Describe the difference between n-type and p-type semiconductor
materials.
04
(c) Determine the quiescent levels of ICQ and VCEQ for the network of Figure
given below.
07
3
Q.5 (a) Label the three regions of operation on a bipolar junction transistor
collector curve.
03
(b) Draw a schematic of class B push-pull amplifier and explain its
operation.
04
(c) Describe the characteristics of amplifiers, including classes of operation,
types of coupling, and frequency ranges.
07
OR
Q.5 (a) Explain the working of voltage doubler circuit using diode. 03
(b) Describe JFET applications as analog switch. 04
(c) Explain the characteristics and operation of enhancement-mode
MOSFET.
07
*************
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This post was last modified on 20 February 2020