Download AKTU B-Tech 4th Sem 2016-17 EEC401 Electronic Circuits Question Paper

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B. TECH.

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THEORY EXAMINATION (SEM–IV) 2016-17

ELECTRONIC CIRCUITS

Time: 3 Hours

Max. Marks : 100

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Note: Be precise in your answer. In case of numerical problem assume data wherever not provided.

SECTION – A

1. Attempt all of the following questions: 10 x 2 = 20
   1. The input signal v1 to an op-amp is v1 = 0.03 sin 1.5x 105 t. What can be the maximum gain of an op-amp with slew rate of 0.4 volts/µs.
   2. Draw the circuit diagram of an integrator and find its output.
   3. What do you mean by slew rate and CMRR of an op-amp.

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   4. Draw Hybrid – model and T-model equivalent of NPN transistor.
   5. Explain Bakhausen criterion.
   6. What are the conditions for operation in triode and saturation region of NMOS and PMOS transistors?
   7. An amplifier has a mid-band gain of 125 and bandwidth of 250 KHz. If 4% negative feedback is introduced, find the new bandwidth and gain, also find the feedback ratio when the bandwidth is restricted to 1MHz.
   8. Draw the circuit of colpitts oscillator and also write its frequency and condition of maintaining oscillations.

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   9. What is the principle of crystal oscillator?
   10. What are the internal capacitances of BJT?

SECTION – B

2. Attempt any five of the following questions: 5 x 10 = 50
   1. Explain inverting amplifier and also derive an expression for the closed loop gain under the assumption that the open loop gain is finite.

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   2. Do the analysis of series-series feedback amplifier to derive gain, input resistance and output resistance.
   3. Draw the circuit of an RC phase shift oscillator using op-amp and derive frequency and condition of oscillation for RC phase shift oscillator.
   4. (i) Explain Hartley oscillator. (ii) Differentiate between DMOSFET and EMOSFET.
   5. Do the analysis bias dc biasing circuit of the NPN transistor to derive Q point and of self stability factor.
   6. DO the small signal analysis of MOS differential pair to determine differential and common mode gain.

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   7. (i) An enhancement type NMOS transistor with V_t =0.7 V has its source terminal grounded and a 1.5 V applied to the gate. In what region does the device operate for a) V_D = 0.5 v b) V_D = 0.9 v c) V_D = 3 v. (ii) Explain the construction and working of N type enhancement MOSFET.
   8. Draw input and output characteristics of common emitter amplifier.
   9. State the properties of an ideal op-amp.

3. Attempt any two parts of the following questions: 2 x 15 = 30
   1. Do the small signal analysis of common emitter amplifier with emitter resistance do derive input resistance, voltage gain (from base to collector), overall voltage gain (source to load), open circuit voltage gain and output resistance.

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   2. Explain the effect of finite loop gain and bandwidth on circuit performance. Also define input offset voltage and input offset current.
   3. (i) Explain all four feedback topologies with their block diagram. (ii) Explain the operation of LC tank circuit.

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