Download Visvesvaraya Technological University (VTU) BE ( Bachelor of Engineering) ECE (Electronic engineering) 2018 Scheme 2020 January Previous Question Paper 3rd Sem 18EC35 Computer Organization and Archite6ture
USN
18EC35
Third Semester B.E. Degree Examination, Dec.20191Un.2020
Computer Organization and Archite6ture
Time: 3 hrs. Max. Marks: 100
Note: Answer any FIVE full questions, choosing ONE full question from each module.
clj Module-1
? 1 a. With a neat diagram, explain basic operational concept of computer. (10 Marks)
h. Explain in brief different types of key parameters that affect the processor performance.
(05 Marks)
c.
Explain the Bus Structures. (05 Marks)
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a. 2 Illustrate Instruction and Instruction sequencing with an example. (10 Marks)
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....- b. Define Byte Addressability, Big-endian and Little-endian assignment. (06 Marks)
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c. Represent 85.125 in IEEE floating point using single precision. (04 Marks)
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Module-2
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t, 3 a. What is an addressing mode? Explain any five types of addressing modes with example.
(10 Marks)
7.
b. Write a program to add 'n' number using indirect addressing mode. (06 Marks)
?
a
c. Explain various assembler directives used in assembly language program. (04 Marks)
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v: T,.
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OR
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4 a. Explain stack operation with an example (10 Marks)
a
o
.t...1,
-
_
b. Explain subroutine linkage with an example using linkage register. (06 Marks)
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rs
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..d 3
c. Explain the shi ft and rotate operations with example. (04 Marks)
?
-':
>-, >
.... 1.) Module-3
3 -
.._ 5 a. Showing the possible register configuration in I/0 interlace, explain program controlled
_,. .
4
.)
CL 0 input/output. (10 Marks)
b. What is an interrupt? With an example illustrate the concept of interrupt.
.....a.
,
?
d
(10 Marks)
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to
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Module-4
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7 a. With figure, explain Internal Organization of 2M x8 dynamic memory chip.
b. Illustrate internal structure of static memories.
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z
OR
8 a. With a neat diagram, explain virtual memory organization. (10 Marks)
b. Briefly explain any four non-volatile memory concepts. (05 Marks)
c. Briefly explain secondary storage devices. (05 Marks)
OR
6 a. Explain in detail, the situations where a number of devices capable of initiating interrupts
are connected to processor. How to resolve the problems? (10 Marks)
b. Explain the registers involved in a DMA interface, to illustrate DMA. (06 Marks)
c. Explain the concept of Vectored Interrupt. (04 Marks)
(10 Marks)
(10 Marks)
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USN
18EC35
Third Semester B.E. Degree Examination, Dec.20191Un.2020
Computer Organization and Archite6ture
Time: 3 hrs. Max. Marks: 100
Note: Answer any FIVE full questions, choosing ONE full question from each module.
clj Module-1
? 1 a. With a neat diagram, explain basic operational concept of computer. (10 Marks)
h. Explain in brief different types of key parameters that affect the processor performance.
(05 Marks)
c.
Explain the Bus Structures. (05 Marks)
c-.1
V
v.
,
t,
OR .=. '
h
t
?
,
a. 2 Illustrate Instruction and Instruction sequencing with an example. (10 Marks)
CI. 7
....- b. Define Byte Addressability, Big-endian and Little-endian assignment. (06 Marks)
,
....6 g
c. Represent 85.125 in IEEE floating point using single precision. (04 Marks)
t/i I I
C QC
. E +
Module-2
? cl
P
:T-; t
i)
t, 3 a. What is an addressing mode? Explain any five types of addressing modes with example.
(10 Marks)
7.
b. Write a program to add 'n' number using indirect addressing mode. (06 Marks)
?
a
c. Explain various assembler directives used in assembly language program. (04 Marks)
0.J ir
,
0
..-
v: T,.
? u-.
OR
F.,
4 a. Explain stack operation with an example (10 Marks)
a
o
.t...1,
-
_
b. Explain subroutine linkage with an example using linkage register. (06 Marks)
.
rs
?
..d 3
c. Explain the shi ft and rotate operations with example. (04 Marks)
?
-':
>-, >
.... 1.) Module-3
3 -
.._ 5 a. Showing the possible register configuration in I/0 interlace, explain program controlled
_,. .
4
.)
CL 0 input/output. (10 Marks)
b. What is an interrupt? With an example illustrate the concept of interrupt.
.....a.
,
?
d
(10 Marks)
r3
g' 72
?
,i,
>,
to ?
?
to
a
t :=
L am. 8
P ;..
7 aJ
-,
?
s-
Module-4
a <
.._: ,,i
7 a. With figure, explain Internal Organization of 2M x8 dynamic memory chip.
b. Illustrate internal structure of static memories.
0
z
OR
8 a. With a neat diagram, explain virtual memory organization. (10 Marks)
b. Briefly explain any four non-volatile memory concepts. (05 Marks)
c. Briefly explain secondary storage devices. (05 Marks)
OR
6 a. Explain in detail, the situations where a number of devices capable of initiating interrupts
are connected to processor. How to resolve the problems? (10 Marks)
b. Explain the registers involved in a DMA interface, to illustrate DMA. (06 Marks)
c. Explain the concept of Vectored Interrupt. (04 Marks)
(10 Marks)
(10 Marks)
1 oft
18Et
Module-5
9 a. Explain the three-bus organization of the processor and its advantages.
(10 Marks)
b. Discuss the organization of hardwired control unit (05 Marks)
c. Discuss the control sequence for execution of instruction ADD(R3), R
1
(05 Marks)
OR
10 a. With a block diagram, describe the organization of a micro programmed control unit.
(10 Marks)
b. Describe the sequence of control signals to be generated to fetch an instruction from
memory in a single bus organization. (10 Marks)
2 of 2
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This post was last modified on 02 March 2020