Download GTU B.Tech 2020 Summer 4th Sem 2140707 Computer Organization Question Paper

Download GTU (Gujarat Technological University Ahmedabad) B.Tech/BE (Bachelor of Technology/ Bachelor of Engineering) 2020 Summer 4th Sem 2140707 Computer Organization Previous Question Paper

Seat No.: ________
Enrolment No.___________


GUJARAT TECHNOLOGICAL UNIVERSITY
BE - SEMESTER? IV EXAMINATION ? SUMMER 2020
Subject Code: 2140707 Date:28/10/2020
Subject Name: COMPUTER ORGANIZATION
Time: 10:30 AM TO 01:00 PM Total Marks: 70
Instructions:
1. Attempt all questions.

2. Make suitable assumptions wherever necessary.

3. Figures to the right indicate full marks.



MARKS
Q.1 (a) Enlist the major components of CPU and explain each in brief.
03

(b) Briefly discuss 4-bit binary adder.
04

(c) Draw and explain flowchart for instruction cycle.
07


Q.2 (a) Discuss three-state bus buffers in brief.
03

(b) Write the name of basic computer registers with their
04
functionalities.

(c) Enlist various addressing modes and explain the same in brief
07
with proper example(s).


OR


(c) Write a note on arithmetic pipeline.
07
Q.3 (a) Draw a space-time diagram for a six-segment pipeline to process
03
seven tasks.

(b) Write microoperations needed to execute the following
04
instructions:
- ADD
- LDA

(c) Write three address and one address instructions program for the
07
following arithmetic expression.
Z = (A + B) * (C ? D / E) + F / G


OR

Q.3 (a) Explain any one pipeline conflicts.
03

(b) Draw the flowchart for first pass of assembler.
04

(c) Explain Booth algorithm. Support your answer by taking small
07
exampl
Q.4 (a) What
e.
do you mean by pseudoinstruction? Give any three
03
examples of pseudoinstructions.

(b) State differences between hardwired control organization and
04
microprogrammed control organization.

(c) Write a brief note on peripheral devices.
07

OR

Q.4 (a) Write assembly language program to add two numbers.
03

(b) Discuss mircroprogrammed control organization in brief with
04
neat diagram.

(c) Explain associative memory in detail.
07
Q.5 (a) Write the difference(s) between arithmetic shift left and logical
03
shift left instruction. Support your answer with small example.
1

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(b) Perform addition operation for the following numbers using
04


signed magnitude number format. (Write necessary assumptions
if required)
A = +7 and B = +3

(c) Discuss any two mapping procedures when considering the
07
organization of cache memory.


OR
Q.5 (a) Write a brief note on memory hierarchy.
03
(b) Explain Input-Output Processor in brief.
04
(c) Elaborate cache coherence problem.
07

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