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| Roll No. | Total No. of Pages : 02 |
| Total No. of Questions : 18 |
B.Tech.(CSE)/(IT) (2011 Onwards) (Sem.-3)
DIGITAL CIRCUITS & LOGIC DESIGN
Subject Code : BTCS-303
M.Code: 56593
| Time: 3 Hrs. | Max. Marks : 60 |
INSTRUCTION TO CANDIDATES :
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- SECTION-A is COMPULSORY consisting of TEN questions carrying TWO marks each.
- SECTION-B contains FIVE questions carrying FIVE marks each and students have to attempt any FOUR questions.
- SECTION-C contains THREE questions carrying TEN marks each and students have to attempt any TWO questions.
SECTION-A
Answer briefly :
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- Multiply 1011.01 with 110.1.
- Discuss the principle of duality.
- Distinguish between combinational and sequential logic circuits.
- Define R-2R ladder DAC
- What is the purpose of state diagram?
- Discuss race around condition in JK flip flop.
- Draw logic diagram of 3-line to 8-line decoder.
- Explain level triggering.
- What is serial-out shift register?
- Write short note on Programmable Logic Arrays.
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SECTION-B
- Explain the working of Gray code? Write its importance and uses.
- Solve the following Boolean functions by using K-Map.
F = (w,x,y,z) = S (0,1,4,5,6,8,9,10,12,13,14) - With a neat block diagram explain the function of encoder. Explain parity checker.
- Discuss the advantages and disadvantages of TTL Logic Family.
- How does a Dynamic RAM cell works? Write its applications.
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SECTION-C
- a) What are Mealy and Moore models of sequential circuits?
b) Give the introduction of Quine-McCluskey method of minimization. - Explain the types of counter. Write the steps to design a Synchronous Counter using JK flip flops.
- What are the types of analog to digital converter techniques? Explain any one in detail.
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NOTE : Disclosure of Identity by writing Mobile No. or Making of passing request on any page of Answer Sheet will lead to UMC against the Student.
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