PTU B.Tech ECE 5th Semester May 2019 70572 COMPUTER ARCHITECTURE Question Papers

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Roll No. [ TTTTTT] [ ] Total No. of Pages : 02
Total No. of Questions : 09

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B.Tech. (Electronics & Computer Engg.) (2011 Onwards) (Sem.-5)
COMPUTER ARCHITECTURE
Subject Code : BTCS-301
M.Code : 70572
Time : 3 Hrs. Max. Marks : 60

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INSTRUCTIONS TO CANDIDATES :

1. SECTION-A is COMPULSORY consisting of TEN questions carrying TWO marks each.
2. SECTION-B contains FIVE questions carrying FIVE marks each and students have to attempt any FOUR questions.
3. SECTION-C contains THREE questions carrying TEN marks each and students have to attempt any TWO questions.

SECTION-A

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1. Answer briefly :
   1. List various logic microoperations.
   2. Define the term instruction code.
   3. Draw the block diagram of the control unit of Basic Computer.
   4. Define the term microinstruction.
   5. List various data transfer instructions.

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   6. What is the purpose of I/O interface?
   7. Explain in brief about serial communication.
   8. Explain in brief about cache memory.
   9. Define the term pipeline.
   10. Explain in brief about vector processors.

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SECTION-B

2. Write a detailed note on shift microoperations.
3. Write a detailed note on control memory.
4. Explain in brief about asynchronous data transfer.

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5. Write a detailed note about array processors.
6. Explain in detail about auxiliary memory.

SECTION-C

6. Write a detailed note on Computer Registers.
7. Write a detailed note on RISC and CISC architecture.

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8. Explain the following in detail :
   1. Arithmetic Pipeline with an example.
   2. Virtual memory.

NOTE : Disclosure of Identity by writing Mobile No. or Making of passing request on any page of Answer Sheet will lead to UMC against the Student.

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