Download SGBAU BCA 2019 Summer 1st Sem Digital Techniques I Question Paper

Download SGBAU (Sant Gadge Baba Amravati university) BCA 2019 Summer (Bachelor of Computer Applications) 1st Sem Digital Techniques I Previous Question Paper

AW?1788
B.C.A. (Part-l) Semester?I Examination
DIGITAL TECHNIQUES?l
Paper?IST3
Time : Three Hours] [Maximum Marks : 60
Note :?(1) All questions carry equal marks.
1.
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(2) Draw neat diagram wherever necessary.
Convert the following numbers and ?nd 'X' :
(29.75)?, = (X), = (X), = (X), 6
Explain OR, AND, NOT gates with logic symbol and truth table. 6
OR
Explain binary subtraction using 1's and 2's complement method with suitable example.
6
Explain the operation of X-OR and X-NOR gate with logic symbol and truth table.
6
Explain the fol1owing characteristics of logic gates :
(1) Fan ?ln
(ii) Propagation Delay
(iii) Noise immunity. 6
Explain the operation of CMOS NAND gate. 6
0R
Give the classi?cation of logic families. 6
Explain ECL logic gate. 6
State and prove the DeMorgan's theorem. 6
Simplify the logic equation by K-map and implement it by NOR gate.
f(A, B, C, D) = nM(4, 6, 10, 12, 13, 15) 6
0R
Verify the following identities :
(i) (A+B) (K+C)=AC+KB
m)M+BHATE=A 6
Simplify the following logic equation by K-map and implement it by NAND gate :
f(A, B, C, D) = 2m(0, 1, 2, 3, 5, 7, 8, 9, 11, 14) 6
YBC ?15352 1 (Contd.)

7 (3) Explain construction and Opcz?ation of full adder circuit with logic circuit and truth
table. 6
(b) Explain the block diagram and functions of 1 bit AIL IC 74181. 6
OR
8 (a) Explain construction and opcration of 4-bit binary parallel adder. 6
(b) Explain binary subtraction using 1's and 2's complement method. 6
9 (a) What is decoder ?.? Expmin f?24 decoder with logic diagram. 6
(b) What is. multiplexer ?9 Explain 4:1 MUX with diagram and operation table. 6
()R
10. (a) Explain cxtemion of 4:16 dccoder into 1:16 demultiplcxer. 6
(b) Exp1aiu the operation of 16:1 MUX with logic diagram. 6
YBC?15352 2
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