Download SGBAU BCA 2019 Summer 1st Sem Digital Techniques I Question Paper

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B.C.A. (Part-II) Semester-I Examination

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DIGITAL TECHNIQUES-I

Paper-1ST3

Time : Three Hours] [Maximum Marks : 60

Note :— (1) All questions carry equal marks.

(2) Draw neat diagram wherever necessary.

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1. (a) Convert the following numbers and find X' : (29.75)₁₀ = (X)₂ = (X)₈ = (X)₁₆
   (b) Explain OR, AND, NOT gates with logic symbol and truth table.

OR

2. (a) Explain binary subtraction using 1's and 2's complement method with suitable example.
   (b) Explain the operation of X-OR and X-NOR gate with logic symbol and truth table.

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3. (a) Explain the following characteristics of logic gates :
   1. Fan -In
   2. Propagation Delay
   3. Noise immunity.
   (b) Explain the operation of CMOS NAND gate.

OR

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4. (a) Give the classification of logic families.
   (b) Explain ECL logic gate.
5. (a) State and prove the DeMorgan's theorem.
   (b) Simplify the logic equation by K-map and implement it by NOR gate.
   f(A, B, C, D) = Σm(1, 6, 10, 12, 13, 15)

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OR

6. (a) Verify the following identities :
   1. (A+B)(A+C)=AC+AB
   2. (A+B)(A+B) =A
   (b) Simplify the following logic equation by K-map and implement it by NAND gate :
   f(A,B,C,D)=Σm (0, 1, 2, 3,5, 7, 8,9, 11, 14)

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7. (a) Explain the block diagram and functions of 1 bit ALU IC 74181.

OR

8. (a) Explain construction and operation of 4-bit binary parallel adder.
   (b) Explain binary subtraction using 1's and 2's complement method.
9. (a) What is decoder ? Explain 2:4 decoder with logic diagram.
   

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   (b) What is multiplexer ? Explain 4:1 MUX with diagram and operation table.

OR

10. (a) Explain extention of 4:16 decoder into 1:16 demultiplexer.
    (b) Explain the operation of 16:1 MUX with logic diagram.

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