Download PTU B-Tech CSE-IT 2020 Dec 3rd Sem 76394 Computer Architecture Question Paper

Download PTU (I.K.Gujral Punjab Technical University (IKGPTU)) B-Tech (Bachelor of Technology) (CSE-IT)- Computer Science Engineering -Information Technology 2020 December 3rd Sem 76394 Computer Architecture Previous Question Paper

Roll No.
Total No. of Pages : 02
Total No. of Questions : 18
B.Tech. (IT) (2018Batch) (Sem.?3)
COMPUTER ARCHITECTURE
Subject Code : BTES-302-18
M.Code : 76394
Time : 3 Hrs. Max. Marks : 60
INST RUCT IONS T O CANDIDAT ES :
1 .
SECT ION-A is COMPULSORY cons is ting of TEN questions carrying TWO marks
each.
2 .
SECT ION-B c ontains F IVE questions c arrying FIVE marks eac h and s tud ents
have to atte mpt any FOUR q ues tions.
3 .
SECT ION-C contains THREE questions carrying T EN marks e ach and s tudents
have to atte mpt any T WO questio ns.
SECTION-A
Answer briefly :
1.
Define Register mode and Absolute Mode with examples.
2.
Distinguish pipelining from parallelism.
3.
State the principle of operation of a carry look-ahead adder.
4.
Execute the following instruction using one address format :
x=c*b/r-d.
5.
What is DRAM semiconductor?
6.
What is the difference between isolated I/O and memory mapped I/O?
7.
What is Cache Coherence?
8.
How do vector processors work?
9.
What is SISD and SIMD?
10. Define Vectored Interrupts.
1 | M-76394
(S2)-1081

---

SECTION-B
11. What is instruction set computer architecture? Discuss its types and also differentiate the
two types of instruction set computer architecture.
12. An instruction is stored at location 300 with its address field at location 301. The address
field at location 301. The address field has the value 400. A processor register R1 contains
the number 200. Evaluate the effective address if the addressing mode of the instruction is :
a) Direct
b) Immediate
c) Relative
d) Register indirect
e) Index with R1 as the index register
13. Explain the difference between hardwired and micro programmed control.
14. What are different pipelining hazards and how are they eliminated?
15. Describe in detail booth's multiplication algorithm and its hardware implementation?
SECTION-C
16. What is direct memory access (DMA)? Why are the read and write control lines in a DMA
controller bi directional?
17. What is the basic approach of page replacement? Discuss all the page replacement
algorithms and which page replacement algorithm is best?
18. a) Explain the mapping process followed in cache memory. Also discuss the relative
advantages and disadvantages of the mapping techniques used.
b) What do you mean by instruction cycle and interrupt cycle? Draw the flowchart for
instruction Cycle.
NOTE : Disclosure of Identity by writing Mobile No. or Making of passing request on any
page of Answer Sheet will lead to UMC against the Student.
2 | M-76394
(S2)-1081

---