Download PTU B-Tech CSE-IT 2020 Dec 3rd Sem 76394 Computer Architecture Question Paper

FirstRanker.com

Roll No. LTI [ 1] Total No. of Pages : 02
Total No. of Questions : 18

--- Content provided by‍ FirstRanker.com ---

B.Tech. (IT) (2018Batch) (Sem.-3)
COMPUTER ARCHITECTURE
Subject Code : BTES-302-18
M.Code : 76394
Time : 3 Hrs. Max. Marks : 60

--- Content provided by⁠ FirstRanker.com ---

INSTRUCTIONS TO CANDIDATES :

1. SECTION-A is COMPULSORY consisting of TEN questions carrying TWO marks each.
2. SECTION-B contains FIVE questions carrying FIVE marks each and students have to attempt any FOUR questions.
3. SECTION-C contains THREE questions carrying TEN marks each and students have to attempt any TWO questions.

SECTION-A

--- Content provided by​ FirstRanker.com ---

Answer briefly :

1. Define Register mode and Absolute Mode with examples.
2. Distinguish pipelining from parallelism.
3. State the principle of operation of a carry look-ahead adder.
4. Execute the following instruction using-one address format :
   

   --- Content provided by‌ FirstRanker.com ---

   x=c*b/r-d.
5. What is DRAM semiconductor?
6. What is the difference between isolated I/O and memory mapped I/O?
7. What is Cache Coherence?
8. How do vector processors work?

--- Content provided by FirstRanker.com ---

9. What is SISD and SIMD?
10. Define Vectored Interrupts.

SECTION-B

1. What is instruction set computer architecture? Discuss its types and also differentiate the two types of instruction set computer architecture.
2. An instruction is stored at location 300 with its address field at location 301. The address field at location 301. The address field has the value 400. A processor register R1 contains the number 200. Evaluate the effective address if the addressing mode of the instruction is :
   

   --- Content provided by‍ FirstRanker.com ---

   a) Direct
   b) Immediate
   c) Relative
   d) Register indirect
   e) Index with R1 as the index register

--- Content provided by‍ FirstRanker.com ---

3. Explain the difference between hardwired and micro programmed control.
4. What are different pipelining hazards and how are they eliminated?
5. Describe in detail booth’s multiplication algorithm and its hardware implementation?

SECTION-C

1. What is direct memory access (DMA)? Why are the read and write control lines in a DMA controller bi directional?

--- Content provided by​ FirstRanker.com ---

2. What is the basic approach of page-replacement? Discuss all the page replacement algorithms and which page replacement-algorithm is best?
3. a) Explain the mapping process -followed in cache memory. Also discuss the relative advantages and disadvantages of the mapping techniques used.
   b) What do you mean by instruction cycle and interrupt cycle? Draw the flowchart for instruction Cycle.

NOTE : Disclosure of Identity by writing Mobile No. or Making of passing request on any page of Answer Sheet will lead to UMC against the Student.

FirstRanker.com

--- Content provided by FirstRanker.com ---