Total No. of Pages : 02
Total No. of Questions : 18
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B.Tech. (CSE) / (IT) (2012 to 2017) (Sem.-3)COMPUTER ARCHITECTURE
Subject Code : BTCS-301
M.Code : 56591
Time : 3 Hrs. Max. Marks : 60
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INSTRUCTION TO CANDIDATES :
- SECTION-A is COMPULSORY consisting of TEN questions carrying TWO marks each.
- SECTION-B contains FIVE questions carrying FIVE marks each and students have to attempt any FOUR questions.
- SECTION-C contains THREE questions carrying TEN marks each and students have to attempt any TWO questions.
SECTION-A
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Write briefly :
- What do you mean by register transfer language in computer architecture?
- What is an instruction format in computer architecture?
- Discuss array processors.
- Compare RISC with CISC?
- What are the benefits of virtual memory?
- Discuss timing and control.
- Define Instruction level pipelining.
- What is mapping functions in cache memory?
- Write the benefits of serial communication?
- Discuss memory synchronization.
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SECTION-B
- What are the special registers in a typical computer? Explain their purposes in detail.
- What do you understand by interrupt? Explain the steps through which the processor handles the interrupts.
- What are the advantages and disadvantages of hardwired and microprogrammed control?
- What is DMA? Give an example where DMA mode of data transfer is useful?
- What are addressing modes? Explain the various addressing modes with examples.
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SECTION-C
- Describe in brief the architecture of a vector processor. What are some of the key limitations of this architecture?
- Write short notes on following :
- Interprocessor communication and synchronization
- Asynchronous data transfer
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- Explain various mechanisms of data transfer from a peripheral device.
NOTE : Disclosure of Identity by writing Mobile No. or Making of passing request on any page of Answer Sheet will lead to UMC against the Student.
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This download link is referred from the post: PTU B.Tech Question Papers 2020 December (All Branches)
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