DEPARTMENT OF
COMPUTER SCIENCE ENGINEERING
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III SEMESTER - R 2017
CS8382 DIGITAL SYSTEMS LABORATORY
LABORATORY MANUAL
Name : _______________________________
Register No : _______________________________
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Section : _______________________________
VISION
is committed to provide highly disciplined, conscientious and enterprising professionals conforming to global standards through value based quality education and training.
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MISSION
- To provide competent technical manpower capable of meeting requirements of the industry
- To contribute to the promotion of Academic Excellence in pursuit of Technical Education at different levels
- To train the students to sell his brawn and brain to the highest bidder but to never put a price tag on heart and soul
DEPARTMENT OF COMPUTER SCIENCE ENGINEERING
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VISION
To provide candidates with knowledge and skill in the field of Electrical and Electronics Engineering and thereby produce extremely well trained employable, socially responsible and innovative Electrical and Electronics Engineers.
MISSION
- To provide the students rigorous learning experience to produce creative solutions to society's needs.
- To produce electrical engineers of high calibre, conscious of the universal moral values adhering to professional ethical code.
- To provide highest quality learning environment for the students emphasizing fundamental concepts with strongly supported laboratory and prepare them to meet the global needs of the industry by continuous assessment and training.
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PROGRAM EDUCATIONAL OBJECTIVES (PEOs)
- Fundamentals To provide students with a solid foundation in mathematics, science and fundamentals of engineering enabling them to solve complex problems in order to develop real time applications.
- Core Competence To train the students to meet the needs of core industry with an attitude of learning new technologies.
- Breadth To provide relevant training and experience to bridge the gap between theory and practice which enable them to find solutions to problems in industry and research that contributes to the overall development of society.
- Professionalism To inculcate professional and effective communication skills to the students to make them lead a team and stand as a good decision maker to manage any constraint environment with good professional ethics at all strategies.
- Lifelong Learning/Ethics To practice ethical and professional responsibilities in the organization and society with commitment and lifelong learning needed for successful professional career.
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PROGRAM OUTCOMES (POs)
- Graduates will demonstrate knowledge of mathematics, science and electrical engineering.
- Graduates will be able to identify, formulate and solve electrical engineering problems.
- Graduates will be able to design and conduct experiments, analyze and interpret data.
- Graduates will be able to design a system, component or process as per needs and specifications.
- Graduates will demonstrate to visualize and work on laboratory and multidisciplinary tasks.
- Graduates will demonstrate skills to use modern engineering tools, software and equipment to analyze problems.
- Graduates will demonstrate knowledge of professional and ethical responsibilities.
- Graduates will be able to communicate effectively by both verbal and written form.
- Graduates will show the understanding of impact of engineering solutions on the society and also will be aware of contemporary issues.
- Graduates will develop confidence for self-education and ability for lifelong learning.
- Graduate who can participate and succeed in competitive examinations.
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CS8381 DIGITAL SYSTEMS LABORATORY
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SYLLABUS
Objectives:
The student should be made to:
- Understand the various logic gates.
- Be familiar with various combinational circuits.
- Understand the various components used in the design of digital computers.
- Be exposed to sequential circuits
- Learn to use HDL
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List of experiments:
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- Verification of Boolean Theorems using basic gates.
- Design and implementation of combinational circuits using basic gates for arbitrary functions, code converters.
- Design and implementation of combinational circuits using MSI devices: a. 4 - bit binary adder / subtractor b. Parity generator / checker c. Magnitude Comparator d. Application using multiplexers
- Design and implementation of sequential circuits: a. Shift -registers b. Synchronous and asynchronous counters
- Coding combinational / sequential circuits using HDL.
- Design and implementation of a simple digital system (Mini Project).
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Course Outcomes:
- Use Boolean simplification techniques to design a combinational hardware circuit.
- Design and Implement combinational and sequential circuits.
- Analyze a given digital circuit – combinational and sequential.
- Design the different functional units in a digital computer system.
- Design and Implement a simple digital system.
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CS8381 DIGITAL SYSTEMS LABORATORY
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Content
| Sl.No. | Name of the Experiment | Page No. |
|---|---|---|
| 1. | Verification of Boolean Theorems using Digital Logic Gates | |
| 2. | Design and Implementation of Combinational Circuits using Basic Gates for Arbitrary Functions, Code Converters | |
| 3. | Implementation of half adder and full adder | |
| 4. | Implementation of half subtractor and full subtractor | |
| 5. | Design and Implementation of 4-Bit Binary Adder / Subtractor using Basic Gates and MSI Devices | |
| 6. | Design and Implementation of Parity Generator / Checker using Basic Gates and MSI Devices | |
| 7. | Design and Implementation of Magnitude Comparator. | |
| 8. | Design and Implementation of Application using Multiplexers / Demultiplexers. | |
| 9. | Design and Implementation of Shift Registers. | |
| 10. | Design and Implementation of Synchronous and Asynchronous Counters. | |
| 11. | Simulation of Combinational Circuits using Hardware Description Language (VHDL / Verilog HDL Software Required). | |
| 12. | Simulation of Sequential Circuits using HDL (VHDL / Verilog HDL Software Required). |
Expt.No.1:
Aim:
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To verify the truth table of basic digital IC's of AND, OR, NOT, NAND, NOR, EX-OR gates
Apparatus required:
| SI.No | Name of the Apparatus | Range | Quantity |
|---|---|---|---|
| 1. | Digital IC trainer kit | 1 | |
| 2. | AND gate | IC 7408 | 1 |
| 3. | OR gate | IC 7432 | 1 |
| 4. | NOT gate | IC 7404 | 1 |
| 5. | NAND gate | IC 7400 | 1 |
| 6. | NOR gate | IC 7402 | 1 |
| 7. | EX-OR gate | IC 7486 | 1 |
| 8. | Connecting wires | As required |
Theory:
Circuit that takes the logical decision and the process are called logic gates. Each gate has one or more input and only one output. OR, AND and NOT are basic gates. NAND, NOR and X-OR are known as universal gates. Basic gates form these gates.
AND gate
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The AND gate performs a logical multiplication commonly known as AND function. The output is high when both the inputs are high. The output is low level when any one of the inputs is low.
OR gate
The OR gate performs a logical addition commonly known as OR function. The output is high when any one of the inputs is high. The output is low level when both the inputs are low.
NOT gate
A NOT gate is the physical realization of the complementation operation. The NOT gate is called an inverter. The output is high when the input is low. The output is low when the input is high.
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NAND gate
The NAND gate is a contraction of AND-NOT. The output is high when both inputs are low and any one of the input is low .The output is low level when both inputs are high.
NOR gate
The NOR gate is a contraction of OR-NOT. The output is high when both inputs are low. The output is low when one or both inputs are high.
EX-OR gate
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An Ex-OR gate performs the following Boolean function, A? B = ( A . B' ) + ( A' . B ). It is similar to OR gate but excludes the combination of both A and B being equal to one. The exclusive OR is a function that give an output signal ‘0' when the two input signals are equal either '0' or '1'.
AND Gate Symbol:
OR Gate:
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OR GATE:
7-Gnd
PIN Diagram:
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NOT Gate symbol:
A Y-A
7404N
TRUTH TABLE :
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| A | A |
|---|---|
| 0 | 1 |
| 1 | 0 |
EXOR Gate symbol:
A Y = AB + AB
B
7486N
TRUTH TABLE:
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| A | B | AB + AB |
|---|---|---|
| 0 | 0 | 0 |
| 0 | 1 | 1 |
| 1 | 0 | 1 |
| 1 | 1 | 0 |
PIN Diagram:
Vcc-14
13
C
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12
7
11
4
10
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0
4
9
6
8
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7-Gnd
PIN Diagram:
Vcc-14
13
C
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12
}
7
11
;
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4
10
8
9
6
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7-Gnd
NAND Gate symbol:
A Y = A-B
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B
7400
TRUTH TABLE
| A | B | A.B |
|---|---|---|
| 0 | 0 | 1 |
| 0 | 1 | 1 |
| 1 | 0 | 1 |
| 1 | 1 | 0 |
NOR Gate:
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PIN Diagram:
Vcc-14
13
C
12
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7
11
4
10
0
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9
6
7-Gnd
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Procedure:
- Connections are given as per the circuit diagram.
- For all the IC's 7th pin is grounded and 14th pin is given +5 supply.
- Apply the inputs and verify the truth table for all gates.
Result:
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The truth tables of all the basic logic gates were verified.
Outcome:
At the completion of an experiment student will able to verify the truth table of all basic gates
Viva - Voce
- List out the basic gate.
- Mention the universal gate.
- How many gates presented in IC 7408?
- What is IC?
- What are the applications of gates?
- Write the truth table of AND gate.
- Write the truth table of OR gate.
- Write the truth table of NOT gate.
- Write the truth table of NAND gate.
- Write the truth table of NOR gate.
- Write the truth table of EX- OR gate.
- What are the classifications of IC?
- What are types of linear integrated circuit?
- What is meant by etching?
- What are the advantages of IC?
- Write the truth table of EX- NOR gate.
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Expt.No.2:
VERIFICATION OF BOOLEAN THEOREMS USING LOGIC GATES
Aim: To verification of Boolean theorems using logic gates
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Apparatus required:
| SI.No | Name of the Apparatus | Range | Quantity |
|---|---|---|---|
| 1. | Digital IC trainer kit | 1 | |
| 2. | AND gate | IC 7408 | 1 |
| 3. | OR gate | IC 7432 | 1 |
| 4. | NOT gate | IC 7404 | 1 |
| 5. | NAND gate | IC 7400 | 1 |
| 6. | NOR gate | IC 7402 | 3 |
| 7. | EX-OR gate | IC 7486 | 1 |
| 8. | Connecting wires | As required |
Theory:
BASIC Boolean Laws
- Commutative Law The binary operator OR, AND is said to be commutative if,
- A+B = B+A
- ?.?=?.?
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- Associative Law The binary operator OR, AND is said to be associative if,
- A+(B+C) = (A+B)+C
- A.(B.C) = (A.B).C
- Distributive Law The binary operator OR, AND is said to be distributive if,
- A+(B.C) = (A+B).(A+C)
- A.(B+C) = (A.B)+(A.C)
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- Absorption Law
- A+AB = A
- A+AB =A+B
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- Idempotent Law
- A+A = A
- ?.? = A
- Complementary Law
- A+A' = 1
- ?.?' = 0
- De Morgan's Theorem
- The complement of the sum is equal to the sum of the product of the individual complements. A+B = A.B
- The complement of the product is equal to the sum of the individual complements. A.B = A+B
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Design
- Absorption Law A+AB = A
A
A
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B
IC7408
A
IC7432
- Involution (or) Double complement Law A = A
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- Idempotent Law
- A+A = A
A
A
A
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IC7432
- A.A = A
A
A
1C7408
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A
- Demorgan's Law A+B = A.B
A
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B
A
A+B
IC7402
A
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B
IC7408
- Distributive Law A+(B.C) = (A+B).(A+C)
B
C
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A
B
A+(BC)
IC7432
A
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(A+B) (A+C)
IC7408
IC7402
A
C
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IC7408
IC7432
A.B
Procedure:
- Obtain the required IC along with the Digital trainer kit.
- Connect zero volts to GND pin and +5 volts to Vcc.
- Apply the inputs to the respective input pins.
- Verify the output with the truth table.
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Result:
Thus the above stated Boolean laws are verified.
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Outcome:
At the completion of an experiment student will able to know the basic laws with their truth table.
Viva - Voce
- What is Demorgan's law?
- What is associative law?
- What is mean by compliment gate?
- Explain the basic laws in digital electronics
- What is double complement?
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Expt.No.3:
HALF ADDER AND FULL ADDER
Aim:
To design and verify the truth table of the Half Adder & Full Adder circuits
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Apparatus required:
| S. No. | Name of the Apparatus | Range | Quantity |
|---|---|---|---|
| 1. | Digital IC trainer kit | 1 | |
| 2. | AND gate | IC 7408 | 1 |
| 3. | OR gate | IC 7432 | 1 |
| 4. | NOT gate | IC 7404 | 1 |
| 5. | EX-OR gate | IC 7486 | 1 |
| 6. | Connecting wires | As required |
Theory:
The most basic arithmetic operation is the addition of two binary digits. There are four possible elementary operations, namely,
0+0=0
0+1=1
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1+0=1
1 + 1 = 0 (with 1 as carry)
The first three operations produce a sum of whose length is one digit, but when the last operation is performed the sum is two digits. The higher significant bit of this result is called a carry and lower significant bit is called the sum.
Half adder:
A combinational circuit which performs the addition of two bits is called half adder. The input variables designate the augend and the addend bit, whereas the output variables produce the sum and carry bits.
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Full adder:
A combinational circuit which performs the arithmetic sum of three input bits is called full adder. The three input bits include two significant bits and a previous carry bit. A full adder circuit can be implemented with two half adders and one OR gate.
From the truth table, the expression for sum and carry bits of the output can be obtained as,
SUM = A'B'C + A'BC' + AB'C' + ABC
CARRY = A'BC + AB'C + ABC' +ABC
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Truth table:
Half Adder
| Sl.No. | Input | Output | ||
|---|---|---|---|---|
| A | B | S | C | |
| 1. | 0 | 0 | 0 | 0 |
| 2. | 0 | 1 | 1 | 0 |
| 3. | 1 | 0 | 1 | 0 |
| 4. | 1 | 1 | 1 | 1 |
From the truth table the expression for sum and carry bits of the output can be obtained as, Sum,
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S = A B
Carry, C = A . B
Circuit diagram:
A
B
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7486
3
S = AB
2
3
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C = A.B
2
7408
Full adder
Truth table:
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| SI.No. | Input | Output | |||
|---|---|---|---|---|---|
| A | B | C | S | C | |
| 1. | 0 | 0 | 0 | 0 | 0 |
| 2. | 0 | 0 | 1 | 1 | 0 |
| 3. | 0 | 1 | 0 | 1 | 0 |
| 4. | 0 | 1 | 1 | 0 | 1 |
| 5. | 1 | 0 | 0 | 1 | 0 |
| 6. | 1 | 0 | 1 | 0 | 1 |