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Download GTU BE/B.Tech 2019 Summer 4th Sem New 2140910 Digital Electronics Question Paper

Download GTU (Gujarat Technological University) BE/BTech (Bachelor of Engineering / Bachelor of Technology) 2019 Summer 4th Sem New 2140910 Digital Electronics Previous Question Paper

This post was last modified on 20 February 2020

GTU BE 2019 Summer Question Papers || Gujarat Technological University


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GUJARAT TECHNOLOGICAL UNIVERSITY

BE - SEMESTER-IV(NEW) - EXAMINATION - SUMMER 2019

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Subject Code:2140910

Subject Name: Digital Electronics

Time:02:30 PM TO 05:00 PM

Instructions:

  1. Attempt all questions.
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  3. Make suitable assumptions wherever necessary.
  4. Figures to the right indicate full marks.

Q.1

  1. Find the XS-3 code of following decimal numbers (i) 26 (ii) 42 (iii) 63 [03 Marks]
  2. Differentiate between combinational logic circuit and sequential logic circuit. [04 Marks]
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  4. Explain why NAND and NOR are known as universal gates and construct AND, OR and NOT using the universal gates. [07 Marks]

Q.2

  1. Convert the following Binary to Gray Code (i)1001 (ii)1010 (iii) 1011 [03 Marks]
  2. Convert the following (i) (4CD)16=( )2 (ii) (26.24)8= ()10 [04 Marks]
  3. Simplify Y=A’BCD’ + BCD’ + BC’D’ + BC’D and implement using NAND gate only. [07 Marks]
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OR

  1. State and explain De Morgan’s theorems with truth tables. [03 Marks]
  2. Explain minterm and maxterm. [04 Marks]
  3. Add 27.125 to -79.625 using 12-bit 2’s complement arithmetic. [07 Marks]

Q.3

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  1. Minimize using K-map f(A,B,C,D) = S(1,3,4,6,8,11,15) +d(0,5,7) also draw MSI circuit for the output. [07 Marks]

OR

  1. Explain parity checking method of error detection. [03 Marks]
  2. Perform the decimal subtraction 206.7-147.8 in 8421 BCD code. [04 Marks]
  3. Discuss 4 — bit magnitude comparator in detail. [07 Marks]
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Q.4

  1. Explain full adder. [03 Marks]
  2. Explain R-2R ladder DAC with necessary diagram. [04 Marks]
  3. Draw 4 bit down counter, explain its working with timing diagram and truth table. [07 Marks]

OR

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  1. Discuss multiplexer with suitable diagram. [03 Marks]
  2. Explain terms Accuracy and settling time for DAC. [04 Marks]
  3. Describe 3 to 8 line decoder with logic diagram and truth table. [07 Marks]

Q.5

  1. Compare SRAM with DRAM. [03 Marks]
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  3. Draw the two input TTL NAND gate circuit with totem pole output. [04 Marks]
  4. Describe operation of D/A converter with binary — weighted resistors. [07 Marks]

OR

  1. Compare SOP and POS. [03 Marks]
  2. Give comparison between EPROM and FLASH memory. [04 Marks]
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  4. Describe the working of look-ahead-carry adder. [07 Marks]

Date:13/05/2019

Total Marks: 70

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