Enrolment No.
GUJARAT TECHNOLOGICAL UNIVERSITY
--- Content provided by FirstRanker.com ---
SEMESTER-III (NEW) EXAMINATION - SUMMER 2019
Subject Code: 2131704 Date: 11/06/2019
Subject Name: Digital Logic Circuits
Time: 02:30 PM TO 05:00 PM Total Marks: 70
Instructions:
--- Content provided by FirstRanker.com ---
- Attempt all questions.
- Make suitable assumptions wherever necessary.
- Figures to the right indicate full marks.
MARKS
Q.1 (a) Perform subtraction using 2’s compliment of 10010 - 10011 03
--- Content provided by FirstRanker.com ---
(b) Explain Associative Law and De Morgan's theorems with necessary diagram, truth table. 04
(c) Design a combinational circuit for full adder and full subtractor. 07
Q.2 (a) Show that AB'C+B+BD'+ABD'+A'C=B+C 03
(b) Convert SR flip-flop into T flip-flop. 04
(c) Simplify the following equation using K-map and implement using logic gates: 07
--- Content provided by FirstRanker.com ---
F(A,B,C,D) = S(0,1,2,3,5,7,8,9,11,14)
OR
(c) Simplify the following Boolean function by using Tabulation method. 07
F=S(0,1,2,8,10,11,14,15)
Q.3 (a) Convert the following number (110011.011)2 to decimal and octal. 03
--- Content provided by FirstRanker.com ---
(b) Design 3 - bit Gray code to binary code converter. 04
(c) Compare various Logic Families. 07
OR
Q.3 (a) List out different types of memories used in digital logic circuits and define them. 03
(b) What is canonical form and standard form of equation? Give examples 04
--- Content provided by FirstRanker.com ---
(c) Design a 3-bit binary counter using T flip-flop 07
Q.4 (a) What is state diagram? Explain with example. 03
(b) Design two inputs Ex-OR gate using 4 X 1 Multiplexer. 04
(c) State the characteristics and disadvantages of Emitter Coupled Logic family. 07
OR
--- Content provided by FirstRanker.com ---
Q.4 (a) Explain D flip flop 03
(b) Explain 4-bit Magnitude Comparator in detail with necessary Boolean expression 04
(c) What is meant by demultiplexer? Give any Example of demultiplexer. 07
Q.5 (a) Draw the diagram of 2 to 4 line decoder. 03
(b) Compare ROM and PLA. 04
--- Content provided by FirstRanker.com ---
(c) Draw the block diagram of Successive Approximation type ADC and explain its operation. 07
OR
Q.5 (a) Draw the diagram of 3 to 8 line decoder 03
(b) Explain arithmetic, logic and shift micro operations 04
(c) Explain R-2R ladder type DAC 07
--- Content provided by FirstRanker.com ---
This download link is referred from the post: GTU BE 2019 Summer Question Papers || Gujarat Technological University
--- Content provided by FirstRanker.com ---