Download GTU BE/B.Tech 2018 Winter 7th Sem New 2172409 Digital Signal Processing For Power Electronics Question Paper

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Seat No.: Enrolment No.

GUJARAT TECHNOLOGICAL UNIVERSITY

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BE - SEMESTER-VII (NEW) EXAMINATION - WINTER 2018

Subject Code: 2172409 Date: 29/11/2018

Subject Name: Digital Signal Processing for Power Electronics

Time: 10:30 AM TO 01:00 PM Total Marks: 70

Instructions:

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1. Attempt all questions.
2. Make suitable assumptions wherever necessary.
3. Figures to the right indicate full marks.

Q.1 (a) If h(n)=(0.2)ⁿu(-n) + (3)ⁿ u(-n) will it be stable? 03

(b) For x(n)={-1,0,1,2,1,0,1,2,1,0,-1}, Plot x(n) & find X(e^jw) at w=0. 04

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(c) Determine and plot the response of an LTI system whose input x(n) and impulse response h(n) is given by x(n) ={1,2,-1,-2} & h(n) = {1,2,3.4}. 07

Q.2 (a) Enlist application of DSP for power electronics field. 03

(b) How pipelining improve the computational speed? 04

(c) An LTI system has impulse response h(n) = 5(-1/2)ⁿu(n). Determine Fourier transform to find the output of this system when the input is x(n) = (1/3)ⁿ u(n). 07

OR

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(c) Find the 4- point DFT of the sequence x(n) ={1,0,2,1}. 07

Q.3 (a) Give difference between linear and circular convolution. 03

(b) Find the IDFT of Y(k) ={1,0,1,0}. 04

(c) Define sampling. State and explain sampling theorem. 07

OR

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Q.3 (a) State relation between DFT and Z-transform. 03

(b) Discuss frequency spectrum using DFT. 04

(c) What is aliasing? 07

Given x(t) ? X(w). For the spectrum of the continuous-time signal, shown in Fig.1, consider the three cases f_s = 2f_x ; f_s > 2f_x and f_s < 2f_x ; draw the spectra, indicating aliasing.

Fig1.

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Q.4 (a) What are the basic elements used to construct block diagram of a discrete time system? 03

(b) (1) Evaluate d(n-1)* d(n+1) .Plot the resultant sequence. 04

(ii) Prove that d(n) = u(n) — u(n-1).

(c) Consider a LTI system with system function as follows: H(z) = (1+2z^-1+ 2z^-2) /(1 - 0.75 z^-1+ 0.125 z^-2). Obtain second order parallel form structure. 07

OR

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Q.4 (a) Explain one-sided Z-transform. 03

(b) Classify various signals used for signal processing. 04

(c) Sketch the cascaded form structure of the FIR system given by difference equation y(n) + y(n-1) +0.25y(n-2) = x(n) . 07

Q.5 (a) Discuss the effect of quantization. 03

(b) What is the difference between von Neumann and Harvard architecture? 04

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(c) Discuss the concept of zero input limit cycle oscillation. How this can be eliminated? 07

OR

Q.5 (a) What are the different formats of fixed point representation? 03

(b) Draw only the block diagram of basic generic hardware architecture for digital signal processor 04

(c) Explain DIT- FFT algorithm using signal flow graphs for N= 4. 07

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