Download PTU B.Tech 2020 March ECE 7th and 8th Sem BTEC 914 Computer Organization And Architecture Question Paper

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Roll No. HEEEEEEEEEEE Total No. of Pages : 02
Total No. of Questions : 09
B.Tech (ECE) (2012 to 2017 E-lll) (Sem.-7,8)
COMPUTER ORGANIZATION AND ARCHITECTURE
Subject Code : BTEC-914

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INSTRUCTIONS TO CANDIDATES :

1. SECTION-A is COMPULSORY consisting of TEN questions carrying TWO marks each.
2. SECTION-B contains FIVE questions carrying FIVE marks each and students have to attempt any FOUR questions.

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3. SECTION-C contains THREE questions carrying TEN marks each and students have to attempt any TWO questions.

SECTION-A

1. Answer briefly :
   1. How memory interleaving is different from cache memory?
   2. What is the purpose of prefetch buffers in instruction pipelining?
   3. What are the trade offs in scalability analysis?

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   4. What is meant by inclusion, coherence and locality in a memory hierarchy?
   5. What is a sector mapping cache?
   6. How multithreading is different from superscalar architecture?
   7. What are the limitations of parallel processing?
   8. What do you understand by MFLOPS?

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   9. What is PCI express?
   10. What is semiconductor memory?

SECTION-B

2. How an instruction is executed? Explain with the help of instruction cycle.

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3. What is an interrupt? What are the various types of interrupt? Explain with example
4. How parallelism is achieved in micro instructions? Discuss.
5. Distinguish between single threaded and multithreaded processor architecture.
6. Describe the language features needed for parallel programming.

SECTION-C

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7. What is memory Organization? What is the different hierarchy of memory?
8. What is meant by Cache-Only Memory Architecture (COMA) model? How is it different from non-uniform-memory-access model?
9. What are the features of Hardwired control and micro programmed control? Discuss.

NOTE : Disclosure of Identity by writing Mobile No. or Making of passing request on any page of Answer Sheet will lead to UMC against the Student.

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