FirstRanker Logo

FirstRanker.com - FirstRanker's Choice is a hub of Question Papers & Study Materials for B-Tech, B.E, M-Tech, MCA, M.Sc, MBBS, BDS, MBA, B.Sc, Degree, B.Sc Nursing, B-Pharmacy, D-Pharmacy, MD, Medical, Dental, Engineering students. All services of FirstRanker.com are FREE

📱

Get the MBBS Question Bank Android App

Access previous years' papers, solved question papers, notes, and more on the go!

Install From Play Store

Download JNTUA M.Tech 2nd Sem Supply 2018 Feb 9D06206c FPGA Architecture And Applications Question Paper

Download JNTUA (JNTU Anantapur) M.Tech ( Master of Technology) 2nd Semester Supply 2018 Feb 9D06206c FPGA Architecture And Applications Previous Question Paper || Download M.Tech 2nd Sem 9D06206c FPGA Architecture And Applications Question Paper || JNTU Anantapur M.Tech Previous Question Paper

This post was last modified on 31 July 2020

This download link is referred from the post: JNTUA M.Tech 2nd Sem last 10 year 2010-2020 Previous Question Papers (JNTU Anantapur)


Code: D06206cM

I M.Tech I Semester Supplementary Examinations February 2018

FPGA ARCHITECTURE & APPLICATIONS (Digital Systems and Computer Electronics)

--- Content provided by FirstRanker.com ---

(For students admitted in 2012, 2013, 2014, 2015 & 2016 only)

Time: 3 hours Max. Marks: 60

Answer any FIVE questions

All questions carry equal marks


  1. (a) Implement the following Boolean function using PAL:

    --- Content provided by FirstRanker.com ---

    (b) Distinguish between FPGA and CPLD.

  2. (a) Explain a Govt. state assignments for FPGA.

    (b) Realize switching functions (2, 3, 4, 6, 7) using 2 input LUTs. Give the truth table implementation in each LUT & show wires in FPGA.

  3. --- Content provided by FirstRanker.com ---

  4. (a) Write about FPGA and compare speed performance of ACT1, ACT2, ACT3 FPGA.

    (b) What is LE? Draw and explain the working of LE of altera FLEX 8000.

  5. (a) What is state transition table?

    (b) Explain how state transaction assignment can be carried at for FPGA.

    --- Content provided by FirstRanker.com ---

  6. (a) Explain the procedure for design of a state machine using one-hot encoding.

    (b) Explain the symbolic representation of FSM architectures.

  7. Write notes on:

    --- Content provided by FirstRanker.com ---

    (a) Architecture centred around non registered PLDs.

    (b) State machine design centered around shift registers.

  8. (a) Design a parallel adder sequential circuit.

    (b) Explain multiplexers.

    --- Content provided by FirstRanker.com ---

  9. Write notes on:

    (a) Counters and parallel controllers.

    (b) Combinational logic circuits.

  10. --- Content provided by FirstRanker.com ---


FirstRanker.com



This download link is referred from the post: JNTUA M.Tech 2nd Sem last 10 year 2010-2020 Previous Question Papers (JNTU Anantapur)

--- Content provided by FirstRanker.com ---