Download VTU BE 2020 Jan ECE Question Paper 17 Scheme 3rd Sem 17EC33 Analog Electronics

Download Visvesvaraya Technological University (VTU) BE ( Bachelor of Engineering) ECE (Electronic engineering) 2017 Scheme 2020 January Previous Question Paper 3rd Sem 17EC33 Analog Electronics

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17EC33
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Third Semester B.E. Degree Examination, Dec.2019/Jan.2020
Analog Electronics
Time: 3 hrs. Max. Marks: 100
Note: Answer any FIVE full questions, choosing ONE pill question from each module.
Module-I
1 a. Derive the expression for input impedance, output impedance, voltage gain and current gain
for common emitter voltage divider bias configuration using re model. (10 Marks)
b. For the emitter-follower circuit shown in Fig.Q.l(b). Determine:
i) Input impedance
ii) Output resistance
iii) Voltage gain
iv) Current gain.
v
Fig.Q.1(b)
(10 Marks)
OR
2 a. Derive the expression for voltage gain, current gain, input resistance, output resistance CE
transistor amplifier using hybrid parameters. (10 Marks)
b. Describe the hybrid n-model. (04 Marks)
c. Determine Zi, Z
0
, A? Ai for the circuit shown in Fig.Q.2(c) using approximate hybrid model.
Given data hi
e
= 1.1K.Q, = 100, h?, = 201.tA/V
i2v
(06 Marks)
2.2k
E--0 V 0
Fig.Q.2(c)
Module-2
3 a. Indicate various operating regions of JFET. Also determine parameters from the
characteristics. (06 Marks)
b. Analyze self bias configuration of JFET and derive the expression for voltage gain, output
impedance and input impedance. (07 Marks)
1 of 3
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Ij
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17EC33
5
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C Li)
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a 71
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C.
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Third Semester B.E. Degree Examination, Dec.2019/Jan.2020
Analog Electronics
Time: 3 hrs. Max. Marks: 100
Note: Answer any FIVE full questions, choosing ONE pill question from each module.
Module-I
1 a. Derive the expression for input impedance, output impedance, voltage gain and current gain
for common emitter voltage divider bias configuration using re model. (10 Marks)
b. For the emitter-follower circuit shown in Fig.Q.l(b). Determine:
i) Input impedance
ii) Output resistance
iii) Voltage gain
iv) Current gain.
v
Fig.Q.1(b)
(10 Marks)
OR
2 a. Derive the expression for voltage gain, current gain, input resistance, output resistance CE
transistor amplifier using hybrid parameters. (10 Marks)
b. Describe the hybrid n-model. (04 Marks)
c. Determine Zi, Z
0
, A? Ai for the circuit shown in Fig.Q.2(c) using approximate hybrid model.
Given data hi
e
= 1.1K.Q, = 100, h?, = 201.tA/V
i2v
(06 Marks)
2.2k
E--0 V 0
Fig.Q.2(c)
Module-2
3 a. Indicate various operating regions of JFET. Also determine parameters from the
characteristics. (06 Marks)
b. Analyze self bias configuration of JFET and derive the expression for voltage gain, output
impedance and input impedance. (07 Marks)
1 of 3
2K~o
?
10?

v C.
0
_
4(

II sliL
@kW- ti
p
)
Fig.Q.4(c)
1
c. Compute g
m
, zi, z
0
and A, for the circuit shown in Fig.Q.3(c). Given
VGSQ =
'Do = 2.03mA, IDss = 10mA, V
p
= -4V and rd = 40K.Q. (07 M
12.-V
3
.
6 1410 .9- ,34 c.
vo
Osu F
+ korm,
I.1 KA-
Fig.Q.3(c)
OR
4 a. Explain the characteristics of enhancement type MOSFET. Also indicate various operating
regions. (06 Marks)
b. Derive the expression voltage gain, input resistance and output resistance of the source
follower. (07 Marks)
c. Evaluate z,, z
0
and for the JFET circuit shown in Fig.Q.4(c). Given: 1DSS = 12mA,
Vp =
-3V, gm= 2mU, rd = 401?2 (07 Marks)
NG,
Module-3
5 a. Derive the expression for cut-off frequency due to source capacitor and coupling capacitor
of a BJT amplifier. (06 Marks)
b. If the applied ac power to a system is 511w at 100mV and the output power is 48W,
Determine: i) Power gain in dB ii) The voltage gain in dB if the output impedance is 40K0
iii) The input impedance. (06 Marks)
c. Derive an expression for Miller input and output capacitance. Also draw the equivalent
circuit. (08 Marks)
OR
6 a. Derive Derive the expression f
t.
' and f,i for the multistage amplifier. (06 Marks)
b. For the circuit shown in Fig.Q.6(b) determine ffii and filo, given C
w
t = 3pF, C. = 5pF,
C
= 4pF, C
gs
= 6pF, Cds = 1 pF, IDSS =
6mA, V
p
= -6V rd = 00 and g?, = 2mU. (08 Marks)
1044
1 k n-
I 01
t 0-k
Fig.Q.6(b)
2 of 3
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Ij
USN

's.

17EC33
5
"
Ttj
0 ?
>' -s--
th
C Li)
ti ?
a 71
E
o 2
rsi
O
z
t
C.
E
Third Semester B.E. Degree Examination, Dec.2019/Jan.2020
Analog Electronics
Time: 3 hrs. Max. Marks: 100
Note: Answer any FIVE full questions, choosing ONE pill question from each module.
Module-I
1 a. Derive the expression for input impedance, output impedance, voltage gain and current gain
for common emitter voltage divider bias configuration using re model. (10 Marks)
b. For the emitter-follower circuit shown in Fig.Q.l(b). Determine:
i) Input impedance
ii) Output resistance
iii) Voltage gain
iv) Current gain.
v
Fig.Q.1(b)
(10 Marks)
OR
2 a. Derive the expression for voltage gain, current gain, input resistance, output resistance CE
transistor amplifier using hybrid parameters. (10 Marks)
b. Describe the hybrid n-model. (04 Marks)
c. Determine Zi, Z
0
, A? Ai for the circuit shown in Fig.Q.2(c) using approximate hybrid model.
Given data hi
e
= 1.1K.Q, = 100, h?, = 201.tA/V
i2v
(06 Marks)
2.2k
E--0 V 0
Fig.Q.2(c)
Module-2
3 a. Indicate various operating regions of JFET. Also determine parameters from the
characteristics. (06 Marks)
b. Analyze self bias configuration of JFET and derive the expression for voltage gain, output
impedance and input impedance. (07 Marks)
1 of 3
2K~o
?
10?

v C.
0
_
4(

II sliL
@kW- ti
p
)
Fig.Q.4(c)
1
c. Compute g
m
, zi, z
0
and A, for the circuit shown in Fig.Q.3(c). Given
VGSQ =
'Do = 2.03mA, IDss = 10mA, V
p
= -4V and rd = 40K.Q. (07 M
12.-V
3
.
6 1410 .9- ,34 c.
vo
Osu F
+ korm,
I.1 KA-
Fig.Q.3(c)
OR
4 a. Explain the characteristics of enhancement type MOSFET. Also indicate various operating
regions. (06 Marks)
b. Derive the expression voltage gain, input resistance and output resistance of the source
follower. (07 Marks)
c. Evaluate z,, z
0
and for the JFET circuit shown in Fig.Q.4(c). Given: 1DSS = 12mA,
Vp =
-3V, gm= 2mU, rd = 401?2 (07 Marks)
NG,
Module-3
5 a. Derive the expression for cut-off frequency due to source capacitor and coupling capacitor
of a BJT amplifier. (06 Marks)
b. If the applied ac power to a system is 511w at 100mV and the output power is 48W,
Determine: i) Power gain in dB ii) The voltage gain in dB if the output impedance is 40K0
iii) The input impedance. (06 Marks)
c. Derive an expression for Miller input and output capacitance. Also draw the equivalent
circuit. (08 Marks)
OR
6 a. Derive Derive the expression f
t.
' and f,i for the multistage amplifier. (06 Marks)
b. For the circuit shown in Fig.Q.6(b) determine ffii and filo, given C
w
t = 3pF, C. = 5pF,
C
= 4pF, C
gs
= 6pF, Cds = 1 pF, IDSS =
6mA, V
p
= -6V rd = 00 and g?, = 2mU. (08 Marks)
1044
1 k n-
I 01
t 0-k
Fig.Q.6(b)
2 of 3
f
17EC33
c.
Determine overall lower 3dB and upper 3dB frequency for a four stage amplifier having an
individual value of fi = 40Hz and fi = 2.5MHz. Also calculate overall bandwidth. (06 Marks)
Module-4
7 a. Explain the concept of feed back using block diagram.
(06 Marks)
b. Derive the expression for input resistance and output resistance of a voltage series feedback
amplifier.
(08 Marks)
c. If the gain of an amplifier changes from a value of -WOO by 10%, calculate the gain change,
if the amplifier used in a feedback circuit having = ?
I
. (06 Marks)
20
OR
8 a. Explain the operation of FET phase shift oscillator. (08 Marks)
b. Describe the Wein bridge oscillator for the oscillating frequency f0 = 2.2kHz. Also draw the
circuit diagram. (06 Marks)
c. Determine the oscillating frequency of the Colpitts oscillator for the given specifications
CI = 750pF, C2 = 2500pF and L = 40?I-l. Also calculate the feedback factor of the Colpitts
oscillator. (06 Marks)
Module-5
9 a. Derive an expression for conversion efficiency of transformer coupled class-A amplifier.
(08 Marks)
b. Calculate the second harmonic distortion for an output waveform having measured values of
VcE
tn
i
n
= 2.4V VcE0 = 10V and VCEmax = 20V. (04 Marks)
c. Explain with the help of neat circuit diagram, voltage series regulator operation. (08 Marks)
OR
10 a. Derive an expression for conversion efficiency of class B push pull amplifier. (08 Marks)
b. A transformer coupled class-A amplifier drives a 1652 speaker through 4:1 transformer using
a power supply of Vcc = 36V, the circuit delivers 2W to the load. Calculate : i) P(ac) across
transformer primary ii) V
L
(ac). (06 Marks)
c. Calculate the harmonic distortion components for an output signal having fundamental
amplitude of 2.1V, second harmonic component amplitude of 0.3V, third harmonic
component of 0.1V and fourth harmonic component of 0.05V. Also calculate total harmonic
distortion. (06 Marks)
. . .
(
1/ t
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