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Download GTU BE/B.Tech 2018 Winter 4th Sem New 2141002 Analog Circuit Design Question Paper

Download GTU (Gujarat Technological University) BE/BTech (Bachelor of Engineering / Bachelor of Technology) 2018 Winter 4th Sem New 2141002 Analog Circuit Design Previous Question Paper

This post was last modified on 20 February 2020

GTU BE/B.Tech 2018 Winter Question Papers || Gujarat Technological University


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GUJARAT TECHNOLOGICAL UNIVERSITY

BE - SEMESTER-1V (NEW) EXAMINATION - WINTER 2018

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Subject Code:2141002 Date:22/11/2018

Subject Name:Analog Circuit Design

Time: 02:30 PM TO 05:00 PM Total Marks: 70

Instructions:

  1. Attempt all questions.
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  3. Make suitable assumptions wherever necessary.
  4. Figures to the right indicate full marks.

Q.1 (a) State the functions of the transistors connected to the reset and discharge 03 pins of IC 555.

(b) What is the role of the inter electrode capacitances Cbc, Cbe and Cce in a 04 hybrid IT model? Why Cce does not figure in the model?

(c) Define the following for an Op Amp: 07

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[1] Input Resistance [2] Slew Rate [3] Balanced output [4] PSRR [5] Voltage Gain [6] Offset Voltage [7] Unity Gain Bandwidth

Q.2 (a) A bipolar junction transistor has hie=1 KQ, hee= 100; hre , hoe are negligible. 03 Cc=3pF and the collector current is 10mA. The short circuit current gain is 10 at a frequency of 10 M Hz. Calculate the values of f,, {3 and f,.

(b) List all the resistances and their typical values in a hybrid IT model 04

(c) Draw the hybrid II model for a single stage CE transistor amplifier having 07 load resistance Ry and obtain the expression for short circuit current gain.

OR

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(c) Draw the hybrid IT model for a transistor-in CE configuration and derive 07 the expression for transconductance gm. Justify the validity of this model.

Q.3 (a) Perform DC analysis of a DualInput Balanced Output Differential 03 Amplifier

(b) For a given operational amplifier, the input voltages are 150 uV and 140 04 pV DC. This amplifier has a differential gain of 4000 and a CMRR of 100. Evaluate its output voltage. What change would occur in its output voltage if the CMRR changes to a new value of 1,00,000 ?

(c) Define CMRR: Discuss the effect of Reon CMRR. How can a constant 07 current source and a current mirror circuit help to improve this value?

OR

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Q.3 (a) For a dual input balanced output, it is given that Vcc= +12V, Rc=4.7 KQ, 03 Rp=100Q and Re= 2.7 KQ. Evaluate its Quiescent point of operation.

(b) What is the significance of Slew Rate? How does it affect the performance 04 of'an Op Amp?

(c) Explain the working of an adder and a Subtractor circuit to perform the 07 mathematical operation Vo=V +V; and Vo=V-V; respectively.

Q.4 (a) What are precision rectifiers? Explain the working of anyone of them. 03

(b) How does the working of an operational amplifier differ in inverting and 04 noninverting configurations?

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(c) Discuss op amp based triangular waveform generator circuits. Obtain the 07 expression for the same.

OR

Q.5 (a) Explain the working of IC 555 as an Astable Multivibrator. 03

(b) What are the functions of the following pins of IC 555? 04

[1] Trigger [2] Threshold [3] Control

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(c) What is thermal drift and error voltage? Suggest methods to reduce the 07 same.

OR

Q.5 (a) Explain the compensation of input offset voltage with a neat diagram. 03

(b) Draw the block diagram of PLL and explain each block. 04

(c) Discuss the features of LM317 Regulator. 07

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OR

Q.5 (a) Derive expression of frequency of oscillation of an RC phase shift 03 oscillator.

(b) Derive the expression for filter transfer function of a first order low pass 04 filter and draw its frequency response characteristics.

(c) Discuss any one application of a PLL in modulation signal detection. 07

OR

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Q.5 (a) Derive expression of frequency of oscillation of a Wein Bridge oscillator. 03



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