Download PTU B.Tech 2020 March ECE 6th Sem BTEC 604 Vlsi Design Question Paper

FirstRanker.com
Firstranker's choice

Roll No. Total No. of Pages : 02

--- Content provided by⁠ FirstRanker.com ---

--- Content provided by‍ FirstRanker.com ---

INSTRUCTION TO CANDIDATES :

1. SECTION-A is COMPULSORY consisting of TEN questions carrying TWO marks each.
2. SECTION-B contains FIVE questions carrying FIVE marks each and students have to attempt any FOUR questions.

--- Content provided by‍ FirstRanker.com ---

3. SECTION-C contains THREE questions carrying TEN marks each and students have to attempt any TWO questions.

SECTION-A

1. Answer briefly :
   1. What are the different architectural style of VHDL?
   2. What is the difference between transport and inertial delay?
   3. Write the syntax for the package body.

   --- Content provided by‌ FirstRanker.com ---

   4. What do you understand by the term entity?
   5. Using data flow design, design 2 input XOR gate.
   6. What is scaling of MOS circuit?
   7. What is noise margin?
   8. Define Overloading

   --- Content provided by FirstRanker.com ---

   9. Differentiate between PLA and PAL
   10. Write the syntax for while loop

SECTION-B

2. Write VHDL code for the full adder in structural modeling.

--- Content provided by​ FirstRanker.com ---

3. Define NMOS inverter. Draw and explain the transfer characteristics.
4. Illustrate the use of package declaration and package body with an example.
5. Write the VHDL code for D flip flop.
6. Write VHDL code for BCD to 7 segment decoder using CASE statement.

SECTION-C

--- Content provided by‍ FirstRanker.com ---

7. Draw and explain MOS structure. Derive the MOS device design equation.
8. Differentiate between NMOS, PMOS and CMOS.
9. Write the VHDL code for 4:1 MUX using different type of architecture techniques.

NOTE : Disclosure of Identity by writing Mobile No. or Making of passing request on any page of Answer Sheet will lead to UMC against the Student.

--- Content provided by‍ FirstRanker.com ---