Roll No. _________________________ Total No. of Pages : 02
Total No. of Questions: 18 B.Tech.(EE) PT (Sem.-3)
DIGITAL ELECTRONICS
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Subject Code : BTEE-404
M.Code : 72164
Time : 3 Hrs. Max. Marks : 60
INSTRUCTION TO CANDIDATES :
- SECTION-A is COMPULSORY consisting of TEN questions carrying TWO marks each.
- SECTION-B contains FIVE questions carrying FIVE marks each and students have to attempt any FOUR questions.
- SECTION-C contains THREE questions carrying TEN marks each and students have to attempt any TWO questions.
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SECTION-A
Answer briefly :
- Convert Decimal Number 4587 into Octal and Hexadecimal Number systems.
- Subtract 21 from 36 using 2's complement method.
- State and prove Demorgan's Theorem.
- Convert AB + A'B' into POS form.
- Define MOD counters.
- Draw a VHDL view of a Digital model.
- What do you mean by figure of merit in Logic family?
- Define accuracy of D/A converters.
- Differentiate between RAM and ROM.
- Define content addressable memories.
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SECTION-B
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- Design a 3 bit odd parity generator.
- Minimize the following expression using Q-M method
Y = ?m (1, 2, 3, 6, 7, 9, 10, 11, 13) - Design SR flip flop using JK flip flop.
- Write a VHDL code for full adder.
- Draw and explain dual slop A/D converter.
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SECTION-C
- Differentiate between various types of ROM.
- Explain FPGA in detail.
- Design universal shift register.
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NOTE: Disclosure of Identity by writing Mobile No. or Making of passing request on any page of Answer Sheet will lead to UMC against the Student.
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