Download AKTU B-Tech 3rd Sem 2018-2019 Computer Organization And Architecture Rcs 302 Question Paper

Download AKTU (Dr. A.P.J. Abdul Kalam Technical University (AKTU), formerly Uttar Pradesh Technical University (UPTU) B-Tech 3rd Semester (Third Semester) 2018-2019 Computer Organization And Architecture Rcs 302 Question Paper

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BTECH
(SEM III) THEORY EXAMINATION 2018-19
COMPUTER ORGANIZATION AND ARCHITECTURE
3 Hours Total Marks: 70
1. Attempt all Sections. If require any missing data; then choose suitably.
SECTION A
Attempt all questions in brief. 2 x7 = 14
What do you understand by Locality of Reference?
. Which of the following architecture is/are not suitable for realizing SIMD?
What is the difference between RAM and DRAM?
. What are the di?erence between Horizontal and vertical micro codes? .
Describe cycle stealing in DMA,
List three types of control signals.
. De?ne the role of N?MD in computer architecture.
Attempt any three of the following:
Evaluate the arithmetic statement X:
with three address two address and one address instruction format a program to
evaluate the expression *
. Perform the division processief 001111 by 0011(use a dividend of 8 bits)
A two way set associatiwa cache memory uses blocks of 4 words The cache can
accommodate a total 2048 words from memory The main memory size is
128K X 32 _
1. Formulate lpertinent information required to construct the cache memory.
11. What is the size of cache memory?
. What 15 associative memory? Explain with the help efabrlock diagram. Also mention
the situation in which associative memory can be ef?c?ve utilized
. A Computer uses a memory unit with 256K words 0T 32 bits each. A binary
instruction code 15 stored in one word of membtv The instruction has four parts: an
indirect hit an operation code a registe. code part to specify one of 64 registers and
an address part.
(i) How manV bits are there in the opegamn code, the register code part and the address
part?
(11) Draw the instruction word Mat and indicate the number of bits in each part.
(iii) How many hits are there hthe data and address inputs of the memory?

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SECTION C
Attempt any one part of the following: 7 x l = 10
(a) Write short notes on :
(i) Instruction pipeline,
(ii) DMA based data transfer.
('b) Explain the difference between vectored and non-vectored interrupt. Explain
stating examples of each.
Attempt any one part of the following: 7x 1 = 10
(3) Draw the ?ow chart of Booth?s Algorithm for multiplication and show the
multiplication process using Booth?s Algorithm for (-7) X (+3).
(b) Write short notes on:
(i) Amdahi?s Law
(ii) Pipelining
Attempt any one part of the following: 7 x l = 10
(a) What is a microprogram sequencer? With block diagram, explain the working
of microprogram sequencer.
(b) Draw a ?owchart for adding and subtracting two fixed point binaIy numbers
where negative numbers are signed 1 s complpInent presentation
Attempt any one part of the following: _ 7 x l = 10
(a) Give the block diagram of DMA controll? :?Why are the read and write
control lines In 3 DMA controller bidxmctlonal"
(1)) Explain all the phases of instruct ?"aytle
Attempt any one part of the following.?
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(:1) Explain the basic concept oiHardwired and Software 0011801 unit wgt neat
diagrams ,
(b)
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SS ;?= X
For the following Reservation table: "
i. Calculate the set of the forbidden lat: ies and collision vector.
ii. Draw a state diagram, show mg a1] pOSSIble initial sequences (cycles)
without a collision In the pipelm
iii. Simple cycles (SC) A
iv. Greedy cycles among SIIrIpIe the cycles
v. MAI (minimum average latency)
vi. What is the minimum allowed constant cycles
vii. Maxi Throughput
viii Throughput if the minimum constant cycle is used.
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