Download GTU (Gujarat Technological University Ahmedabad) B.Tech/BE (Bachelor of Technology/ Bachelor of Engineering) 2020 Summer 3rd Sem 3131704 Digital Electronics Previous Question Paper
Enrolment No.___________
GUJARAT TECHNOLOGICAL UNIVERSITY
BE - SEMESTER? III EXAMINATION ? SUMMER 2020
Subject Code: 3131704 Date:02/11/2020
Subject Name: DIGITAL ELECTRONICS
Time: 02:30 PM TO 05:00 PM Total Marks: 70
Instructions:
1. Attempt all questions.
2. Make suitable assumptions wherever necessary.
3. Figures to the right indicate full marks.
MARKS
Q.1
(a) Design a logic circuits for AND,OR and NOT gate using only
03
NAND gates.
(b) What is the difference between demultiplexer and multiplexer ?
04
Explain with necessary diagram and truth table.
(c) Explain D flip flop in detail with circuit diagram and truth table
07
Q.2
(a) Derive the SOP expression for following term
03
AB'C' + ABC' + AB'CD + A'BC' + AB
(b) Explain binary to gray and gray to binary conversion with
04
circuit diagram and truth table.
(c) Minimize the following function using tabulation method:
07
F(w, x, y, z) = (0,1,2,8,10,14,15)
OR
(c) Design a logic circuit for half and full subtraction circuits with
07
K-map equations and truth table.
Q.3
(a) Convert the following numbers to decimal:
03
(10101.101)2 , (330.4)8 , (A325)16
(b) Construct 3x8 decoders with diagram and necessary truth table.
04
(c) Explain following terms with example
07
1) Inter register-transfer operation
2) Arithmetic micro operation
3) Shift micro operation
4) Logic micro operation
OR
Q.3
(a)
Dr
aw the circuit of 3 input TTL(Transistor Transistor Logic)
03
NAND gate and explain its operation.
(b)
Explain working of 4-bit binary ripple counter.
04
(c)
Simplify the following equation using K-map and
07
implement using logic gates:
F(A,B,C,D) = (0,1,2,3,5,7,8,9,10,12,13)
Q.4
(a)
Explain BCD adder with diagram and truth table
03
(b) Explain 1's and 2's complement with example
04
(c)
Explain 2-bit UP synchronous counter with K-map
07
equations and circuit diagram
OR
Q.4
(a) Write short note on PLA.
03
(b) Reduce the expression A+B[AC+(B+C')D]=A+BD
04
(c) With neat sketch explain the operation of clocked RS flip flop
07
with NAND and NOR gates.
1
Q.5
(a) Represent the decimal number 8620 in BCD, Excess-3, and
03
Gray code.
(b) Explain 2 bit magnitude comparator with necessary diagram
04
and equation.
(c)
List out different types of memories used in digital logic
07
circuits and define them.
OR
Q.5
(a) Explain meaning of following micro operations
03
1) T1 : A+B'+1
2) T2 : A B
3) T3 : shr A
(b) Explain BUS transfer logic for two registers
04
(c) Design a logic circuit with JK flip-flop flip flop for the given
07
state sequence with necessary K-map equation
Present state
Next state
000
001
001
010
010
011
011
100
100
101
101
000
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2
This post was last modified on 04 March 2021