FirstRanker Logo

FirstRanker.com - FirstRanker's Choice is a hub of Question Papers & Study Materials for B-Tech, B.E, M-Tech, MCA, M.Sc, MBBS, BDS, MBA, B.Sc, Degree, B.Sc Nursing, B-Pharmacy, D-Pharmacy, MD, Medical, Dental, Engineering students. All services of FirstRanker.com are FREE

📱

Get the MBBS Question Bank Android App

Access previous years' papers, solved question papers, notes, and more on the go!

Install From Play Store

Download GTU BE/B.Tech 2019 Winter 4th Sem New 2142406 Digital Electronics And Its Applications Question Paper

Download GTU (Gujarat Technological University) BE/BTech (Bachelor of Engineering / Bachelor of Technology) 2019 Winter 4th Sem New 2142406 Digital Electronics And Its Applications Previous Question Paper

This post was last modified on 20 February 2020

GTU BE/B.Tech 2019 Winter Question Papers || Gujarat Technological University


Enrolment No.

GUJARAT TECHNOLOGICAL UNIVERSITY
BE - SEMESTER- IV (New) EXAMINATION - WINTER 2019

--- Content provided by‍ FirstRanker.com ---

Subject Code: 2142406
Date: 13/12/2019
Subject Name: Digital Electronics and its applications
Time: 10:30 AM TO 01:00 PM
Total Marks: 70

--- Content provided by‍ FirstRanker.com ---

Instructions:

  1. Attempt all questions.
  2. Make suitable assumptions wherever necessary.
  3. Figures to the right indicate full marks.
    1. Compute following in binary = 10 % (1010)2 = ( )2 [03]
    2. --- Content provided by​ FirstRanker.com ---

    3. Answer following with necessary computation. [04]
      1. (0011) Excess-3 =
      2. 1.L1IH=
    4. State logic families. Explain meaning of VIH, VOH, VIL and VOL. State these values for 5V CMOS logic. [07]
  1. --- Content provided by‌ FirstRanker.com ---

    1. State universal gates. Draw implementation diagram of X= A+B function using universal gate. [03]
    2. Simplify function F(x,y,z) = Sm(3,7) using K Map. [04]
    3. Realize expression using minimum NOR gates only. [07]
      Y =AB'+AC'+C+ AD + AB'C + ABC

      OR

      Implement following using NAND gates only.

      --- Content provided by​ FirstRanker.com ---

      Y=(P+Q+R)(P'+Q+R')(P)
    1. Draw schematic diagram of 8:1 multiplexer circuit using two 4:1 multiplexer and necessary logic gates. [03]
    2. Explain why combinational logic alone cannot be used for processor implementation. [04]
    3. Design full subtractor circuit using decoder and required gates. [07]

      OR

      --- Content provided by⁠ FirstRanker.com ---

      A and B are two 2-bit numbers. Draw schematic diagram for magnitude comparator using 4 to 16 decoder which use A and B as inputs. Write output equations for (1) A>B (2) A=B (3) A
    1. Draw schematic diagram of 4-bit binary parallel subtractor. [03]
    2. Design a single digit BCD adder using 4-bit binary adders. [04]
    3. What are the differences between latch and flip-flop? [07]
    4. --- Content provided by​ FirstRanker.com ---

    1. Define state and state diagram. [03]
    2. Design synchronous 3-bit binary counter. [04]

      OR

      What is NOVA RAM?
    3. Compare SDRAM and DRAM. [07]
    4. --- Content provided by​ FirstRanker.com ---

    1. Design a circuit for 4-bit shift right register. [03]
    2. Is it necessary to use WRITE signal with ROM in application circuits? Justify your answer. [04]
    3. Define (1) Accumulator (2) ALU register [07]
  2. --- Content provided by‍ FirstRanker.com ---

    1. What is micro program control of microprocessor? Explain the concept. [03]

      OR

      Construct D-flip flop using JK flip flop.
    2. Draw schematic of 2-bit ALU. [04]
    3. Explain concept of PLA control of microprocessor. [07]
  3. --- Content provided by⁠ FirstRanker.com ---

FirstRanker.com



This download link is referred from the post: GTU BE/B.Tech 2019 Winter Question Papers || Gujarat Technological University

--- Content provided by‌ FirstRanker.com ---