Download GTU (Gujarat Technological University) BE/BTech (Bachelor of Engineering / Bachelor of Technology) 2018 Winter 4th Sem New 2140910 Digital Electronics Previous Question Paper
1
Seat No.: ________ Enrolment No.___________
GUJARAT TECHNOLOGICAL UNIVERSITY
BE - SEMESTER ?IV (NEW) EXAMINATION ? WINTER 2018
Subject Code:2140910 Date:28/11/2018
Subject Name:Digital Electronics
Time: 02:30 PM TO 05:00 PM Total Marks: 70
Instructions:
1. Attempt all questions.
2. Make suitable assumptions wherever necessary.
3. Figures to the right indicate full marks.
MARKS
Q.1 (a) Convert (0.6875)10 to binary equivalent number 03
(b) Using 10?s complement ,subtract (i) (72532-3250)10
(ii) (3250-72532)10
04
(c) State and Prove De-Morgan?s theorems with necessary truth table. 07
Q.2 (a) Prove that a positive-logic AND gate is a negative-logic OR gate. 03
(b) Why NAND gate and NOR gate are known as universal gates?
Obtain Ex-OR and Ex-NOR using NAND.
04
(c) Write short note on error detection codes. 07
OR
(c) Write short note on Gray code. 07
Q.3 (a) Reduce the expression f= (B+BC) (B+ ?? ?
?? )(B+D) 03
(b) Define the following general characteristics of logic families. (i)
Propagation delay time (ii) Noise Margin (iii) Fan ? out
(iv) Power dissipation
04
(c) Minimize the following Boolean expression using K- Map and
realize it using logic gates.
F(A,B,C,D)=?m(0,1,5,9,13,14,15)+d(3,4,7,10,11)
07
OR
Q.3 (a) Compare K-map and tabular method of minimization. 03
(b) Compare Counters and Registers. 04
(c)
Express the Boolean function F=A+ ?? C in a sum of min-terms.
07
Q.4 (a) Distinguish between combinational and sequential logic circuits. 03
(b) Explain full- subtractor in brief. 04
(c) Write short note on Multiplexers. 07
OR
Q.4 (a) State the basic difference between synchronous and asynchronous
counters.
03
(b) Explain operation of 4 bit left shift register with necessary diagrams. 04
(c) Differentiate between level triggering and edge triggering of flip-
flops. Explain Master-Slave J-K flip-flop configuration.
07
Q.5 (a) Define following specification of ADC (i) Resolution (ii) Conversion
time (iii) Quantization error
03
(b) Compare between various types of ROM. 04
(c) Explain internal organization of RAM , Draw and explain with
necessary block diagram the process of writing in memory and
reading from memory also.
07
OR
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1
Seat No.: ________ Enrolment No.___________
GUJARAT TECHNOLOGICAL UNIVERSITY
BE - SEMESTER ?IV (NEW) EXAMINATION ? WINTER 2018
Subject Code:2140910 Date:28/11/2018
Subject Name:Digital Electronics
Time: 02:30 PM TO 05:00 PM Total Marks: 70
Instructions:
1. Attempt all questions.
2. Make suitable assumptions wherever necessary.
3. Figures to the right indicate full marks.
MARKS
Q.1 (a) Convert (0.6875)10 to binary equivalent number 03
(b) Using 10?s complement ,subtract (i) (72532-3250)10
(ii) (3250-72532)10
04
(c) State and Prove De-Morgan?s theorems with necessary truth table. 07
Q.2 (a) Prove that a positive-logic AND gate is a negative-logic OR gate. 03
(b) Why NAND gate and NOR gate are known as universal gates?
Obtain Ex-OR and Ex-NOR using NAND.
04
(c) Write short note on error detection codes. 07
OR
(c) Write short note on Gray code. 07
Q.3 (a) Reduce the expression f= (B+BC) (B+ ?? ?
?? )(B+D) 03
(b) Define the following general characteristics of logic families. (i)
Propagation delay time (ii) Noise Margin (iii) Fan ? out
(iv) Power dissipation
04
(c) Minimize the following Boolean expression using K- Map and
realize it using logic gates.
F(A,B,C,D)=?m(0,1,5,9,13,14,15)+d(3,4,7,10,11)
07
OR
Q.3 (a) Compare K-map and tabular method of minimization. 03
(b) Compare Counters and Registers. 04
(c)
Express the Boolean function F=A+ ?? C in a sum of min-terms.
07
Q.4 (a) Distinguish between combinational and sequential logic circuits. 03
(b) Explain full- subtractor in brief. 04
(c) Write short note on Multiplexers. 07
OR
Q.4 (a) State the basic difference between synchronous and asynchronous
counters.
03
(b) Explain operation of 4 bit left shift register with necessary diagrams. 04
(c) Differentiate between level triggering and edge triggering of flip-
flops. Explain Master-Slave J-K flip-flop configuration.
07
Q.5 (a) Define following specification of ADC (i) Resolution (ii) Conversion
time (iii) Quantization error
03
(b) Compare between various types of ROM. 04
(c) Explain internal organization of RAM , Draw and explain with
necessary block diagram the process of writing in memory and
reading from memory also.
07
OR
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2
Q.5 (a) Define following specifications of DAC (i) Resolution (ii) Accuracy
(iii) Settling time (iv) Monotonicity.
03
(b) Compare various D/A Converters. 04
(c) Describe operation of D/A converter with binary weighted resistors. 07
*************
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This post was last modified on 20 February 2020