Download JNTUA MCA 2019 May Reg-Supply 2nd Sem 17F00202 Computer Organization Question Paper

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Code: 17F00202

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Answer all the questions

1. Explain the logic diagram of a 4-bit adder-subtractor and explain with the help of a truth table.
2. Explain the process of floating point number multiplication with a diagram.

   OR

   Explain the hardware for a 2 bit-by-2bit array multiplier and explain its working.
3. Draw a flow chart that explains the complete operations of how an instruction is fetched, decoded and executed in a computer.

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4. Explain memory address map with example.
5. Explain read and write operations with respect to associative memories.

   OR

   Explain various addressing modes with example.
6. What is mapping function? What are the ways the cache can be mapped? Explain.
7. Explain design of multiplier control unit using any hardwired design method.

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8. For a single bus organization of CPU, write micro-operations and control signals for unconditioned branch instruction.

   OR

   Write a program to avaluate the arithmetic statement:
   X = (A+B)* (C+D)
   (i) Using an accumulator type computer with one address instruction.
   (if) Using two or three address instructions.
   

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   (iii) Using stack-organized computer:with zero address instructions.
9. Explain Flag transfer and address transfer.
10. Explain block diagram of an Asynchronous communication interface and explain its operation in detail.
11. Explain memory interface circuit.

    OR

    Differentiate I/O versus memory bus.

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12. Explain: (i) Interrupt cycle. (ii) DMA control. (iii) Modes of transfer.
13. What is interprocessor synchronization? Explain.
14. What is parallel processing? Explain its mechanism.

    OR

    Explain RISC pipeline.
15. Explain interconnection structure for multiprocessor systems.

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