Printed Pages: 7
NEC - 309
(Following Paper ID and Roll No. to be filled in your Answer Books)
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Paper ID: 2289954
Roll No.
B.TECH.
Regular Theory Examination (Odd Sem - III),2016-17
DIGITAL LOGIC DESIGN
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Time: 3 Hours
Max. Marks: 100
Note: Attempt All sections. If require any missing data: then choose suitably.
Section - A
- Attempt all questions in brief. (10×2=20)
- Perform 2's complement subtraction of 010110-100101.
- What is the feature of gray code?
- Write the logic equation and draw the internal logic diagram for a 4 to 1 mux.
- What is a priority encoder?
- List the major differences between PLA and PAL.
- Define a Bus. What are the different types of buses?
- Give the comparison between combinational circuits and sequential circuits.
- What are the different types of flip-flop?
- Give the comparison between synchronous & asynchronous sequential circuits.
- What is Ram? Explain the different types of RAM in detail.
- When does race condition occur?
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Section - B
- Attempt any three of the following: (3×10=30)
- Reduce the Boolean function using k-map technique and implement using gates f (w,x,y,z) = ?m(0,1,4,8,9,10) which has the don't cares condition d(w, x, y, z) = ?m(2,11)
- Implement the following multiple output combinational logic circuit using a 3 to 8 decoder.
- f1 = ?m(1,2,3,5,7)
- f2 = ?m(0,3,6)
- f1 = ?m(0,2,4,6)
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- Realize a JK flip flop using SR flip flop.
- A SR flip flop using NAND gates and explain its operation.
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Section - C
- Attempt any one part of the following (1×10=10)
- Detect and correct error (if any) in the following received even parity Hamming code word 00111101010.
- Minimize the given Boolean function using Quine Mc Clusky method f(A,B,C,D) = ? m(0,1,2,4,5,8,9,11,15) and implement the simplified function using NOR gates only.
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- Attempt any one part of the following (1×10=10)
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- Obtain the simplified Boolean expression for the output F and G in terms of the input variables in the circuit of fig. 1
- Implement the full adder and full subtractor using decoder.
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- Obtain the simplified Boolean expression for the output F and G in terms of the input variables in the circuit of fig. 1
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- Design a combinational circuit that compares the magnitude of two 3 bit numbers and its output indicates whether A>B, A =B, A<B.
- Construct a BCD to excess 3 code converter with a 4 bit adder. What must be done to change the circuit to an excess 3 to BCD code converter?
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- Attempt any one part of the following (1×10=10)
- Design a combinational circuit using a ROM. The circuit accepts a three-bit number and outputs a binary number equal to the square of the input number.
- Draw a PLA circuit to implement the functions f1 = A'B + AC' + A'BC', f2 = (AC + AB + BC)', f3 = BC + AC + A'BC'
- Attempt any one part of the following (1×10=10)
- A sequential circuit has three flip flop A,B and C; one input x in and one output y out. The state diagram is shown in fig2. The circuit is to be designed by treating the unused states as don't-care conditions. Use T flip flop in the design.
- Design a 4 bit binary synchronous counter with D flips flop.
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- A sequential circuit has three flip flop A,B and C; one input x in and one output y out. The state diagram is shown in fig2. The circuit is to be designed by treating the unused states as don't-care conditions. Use T flip flop in the design.
- Attempt any one part of the following (1×10=10)
- Derive the transition table for the asynchronous sequential circuit shown in fig.3 determine the sequence of internal states Y, Y2 for the following sequence of input XX2: 00,10;,11,01,11,10,00.
- An asynchronous sequential circuit is described by the excitation function Y = x^x + (x + x)y and z = y
- Draw the logic diagram of the circuit
- Drive the transition table and output map.
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- Derive the transition table for the asynchronous sequential circuit shown in fig.3 determine the sequence of internal states Y, Y2 for the following sequence of input XX2: 00,10;,11,01,11,10,00.
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