Firstranker's choice
S Cin=0
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Cin=1
0 D = A + B (add)
D = A +1(increment)
1 D = A-1(decrement) D = A + B'+1(subtract)
(f) What do you mean by Bus and explain bus interconnection?
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[4×5=20]
Attempt any FOUR questions.
(a) What are addressing modes? What is the need of having many addressing modes in your machine? Discuss indirect and register indirect addressing in details.
(b) What is an array multiplier? Design an array multiplier that multiplies two 4-bit numbers. Use AND gates and binary adders.
(c) What is ROM? How does PROM differ form EEPROM.
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(d) What is Stack Organization ? Compare register stack and memory stack ?
(e) Specify the control word that must be applied to the processor to implement the following micro-operation.
(1) R1 R2+R3
(2) R4 R4
(3) R5 R5-1
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(4) R6 shl R1
(5) R7 input
3 [2×10=20]
Attempt any TWO questions.
(a) Explain the difference between hardwired control and micro programmed control. Is possible to have a hardwired control associated with a control memory?
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(b) What is the meaning of the term one-address instruction? How can an instruction, which requires three operands be executed in such machine ? Explain with the help of an example.
(c) Write a program to evaluate the arithmetic statement:
X = A-B+C*(D* E – F)
= G+H*K
(1) Using an accumulator type computer with one address instruction.
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(2) Using a stack organized computer with zero address operation instructions.
Attempt any TWO question.
4 1 [2×10=20]
(a) Explain LIFO, FIFO and CPU page replacement algorithm with example.
(b) A virtual memory has a page size of 1K words. There are eight pages and four blocks. The associative memory page table contains the following entries.
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Page Block
0 3
1 1
4 2
6 0
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[Contd...
110405]
(f) Draw the hardware details for Booth Multiplication algorithm and using Booth's Multiplication method multiply decimal number (-23) and (+9).
110405]
2 3 [ Contd...
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Firstranker's choice
Make a list of all virtual addresses (in decimal) that will cause a page fault if used by CPU.
2 3 A Computer employs RAM chips of 256 × 8 and ROM chips 1024×8. The computer system needs 2K bytes of RAM, 4K bytes of ROM and 4 interface units, each with four registers. A memory mapped I/O configuration is used. The Two highest-order bits of the address bus are assigned 00 for RAM, 01 for ROM, and 10 for interface registers.
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(a) How many RAM and ROM chips are needed?
(b) Draw a memory address map for the system.
(c) Give the address range in hexadecimal for RAM, ROM and interface
What do you mean by memory management hardware? Explain the basic components of memory management unit.
Printed Pages: 4
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1 0405
(Following Paper ID and Re
PAPER ID : 110405
Roll No.
(SEM. IV) THEOR
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COMPUTE
Time: 3 Hours]
Nate:
(1) Attempta
(2) All quest
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Attempt any TWO questions. [2×10=20]
(a) Describe asynchronous date transfer. What are the methods through which it can be achieved? Explain Stroke control and Handshaking.
(b) What are the various standard communication interfaces? Explain with the help of synchronous communication?
(c) Describe DMA with suitable block diagram, Why does DMA have priority over the CPU when both request a memory transfer? Explain.
1 Attempt any FOUR
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(a) Given the 8 bit bit composite w single errors an
(b) What do you design of high
(c) What is the rac quadratic equa
(d) Represent dec excess-3 code;
(e) Design an arith n bit data inpu following four the input carry two stages.
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110405]
4 [2600]
110405]
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