Download AKTU B-Tech 7th Sem 2016-2017 NEC 703 Vlsi Design Question Paper

Download AKTU (Dr. A.P.J. Abdul Kalam Technical University (AKTU), formerly Uttar Pradesh Technical University (UPTU) B-Tech 7th Semester (Seventh Semester) 2016-2017 NEC 703 Vlsi Design Question Paper

Printed Pages: 3 NEC-703
_ 4?
l?Following Paper ID and Roll No. to be ?lled in your
Answer Books)
l?npcl? II): ZIHI358 RollNo. i
B.TECH.
Regular Theory Examination (Odd Sem-VII), 2016-17
? VLSIDESIGN '
Time : 3 Hours Max. Marks : 100
SECTION - A
1 Attempt all questions. All parts carry equal marks.
Write answer of each part in short. . (10X2=20)
a) What do you meant by threshold voltage of MOS
transistor? Explain
b) List the steps used for CMOS fabrication.
0) De?ne delay time and discuss delay models.
(1) I Name any two basic CAD tools and explain.
e) Describe basic principle of pass transistor circuits.
f) Write the importance low power in VLSI
architectures.
g) Bring out the drawbacks of dynamic logic.
h) Distinguish between SRAM and DRAM.
'i) Classify adiabatic logic circuits.
703/12/2016/7860 ' (1) [P.T.O.

NEC-703
j) Mention the scaling principles. What is the need
for sealing.
SECTION - B
N ote: Attempt any ?ve questions from this section.
(5 x 10=50)
2. Analyze the characteristicsofCMOS inverter with neat
sketch.
3. What do yOu mean by Design for testability. Discuss scan
based techniques.
4. Narrate 1n detail about VLSI low power architectures with
suitable diagram
5. Design an 8MB X 16 bit memory architecture using 5 12K
X 8 bit memory chip.
6. Explain the Ad Hoc testable design techniques with a
suitable example.
7. Illuminate the n?well CMOS fabrication process with neat
diagrams.
8. Analyze the different gate delay model of CMOS gate
transistor.
9. Differentiate between EEPROM and F lash memory.
SECTION - C
N ote: Attempt any two questions from this section.
(2 x 15=30)
10. Implement a 2 input NAND gate using:
a) Dynamic CMOS logic
703/12/2016/7860 (2)
ll.
12.
NEC-703
b) Domino CMOS logic
Derive the expression foi total power dissipation of a
CMOS circuit. '
Narrate 1n detail about the operation of NMOS transistor
with different operating modes.
703/12/2016/7860 ' (3)