Download JNTUA M.Tech 2nd Sem 2019 Feb 17D06201 Embedded System Design Question Paper

Firstranker's choice

Code: 17D06201

FirstRanker.com

--- Content provided by FirstRanker.com ---

M.Tech II Semester Supplementary Examinations January/February 2019

EMBEDDED SYSTEM DESIGN

(Common to DECS, ECE, DSCE, VLSI, VLSIS & VLSISD)

(For students admitted in 2017 only)

Time: 3 hours

--- Content provided by FirstRanker.com ---

Max. Marks: 60

Answer all the questions

1. What is an embedded system? Explain the embedded system design and development life cycle.
   OR
   Explain ISA architecture models, processor design, and memories of embedded processors.

--- Content provided by FirstRanker.com ---

2. With neat sketches, explain the architecture of the MSP430 processor.
   OR
   Explain the addressing modes and instruction set of the MSP430 processor.
3. Explain the interfacing mechanism of the MSP430 processor with digital inputs and outputs.
   OR
   

   --- Content provided by FirstRanker.com ---

   What is a watchdog timer? Explain Timer-A and Timer-B modes of operation.
4. Explain the interfacing mechanism of SPI with USCI.
   OR
   Explain inter-integrated circuit bus and its operation.
5. What is UART? Why do we use UART? Explain UART architecture.
   

   --- Content provided by FirstRanker.com ---

   OR
   Explain the analog-to-digital interfacing mechanism in MSP430.

FirstRanker.com