Download MU-(University of Mumbai or University of Bombay) MCA (Master of Computer Application) 2019 May 1st Sem 55803 Computer Organisation and Architecture Previous Question Paper
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56188
(3 Hours) [Total marks: 100]
Note (1) Question No. 1 is compulsory.
(2) Attempt any four out of remaining six questions.
(3) Answer to sub-questions should be grouped together.
Q1. (a) Using K-Maps, simplify the following expression in four variables A,
B, C, D. Draw logic diagram for the obtained solution.
F(A, B, C, D) = ? (0,2,4,5,6,7,8) + d(12, 13,14,15)
5
(b Explain micro operation in detail. 5
(c) Compare computer organization and computer architecture. 5
(d) Explain Synchronous counters in detail. 5
Q2. (a) What is the significance of RAID? Explain any four RAID levels in
detail.
10
(b) Why are flip-flops called as bi-stable elements? Explain S-R flip flop
in detail.
10
Q3. (a) Compare hardwired Vs micro programmed control unit. 10
(b) Why Cache memory is needed? Name various elements of cache
design.
10
Q4. (a) Difference the following 10
I. SRAM & DRAM
II. Programmed I/O & Interrupt driven I/O
(b) Discuss 1 to 8 de-multiplexer using truth table. Draw its
implementation using the appropriate gates.
10
Q5. (a) What is instruction pipelining? Write a detailed note on six stage
instruction pipeline along with diagram. How conditional branching
affects pipeline performance?
10
(b) With reference to parallel processing explain SISD, SIMD, MISD
and MIMD. What is their significance in practical parallel processing
approaches?
10
Q6. (a) Explain DMA technique in detail with the help of suitable diagram.
(Explain Breakpoints and Cycle stealing in it)
10
(b) Define cluster. Explain different clustering methods in detail with its
benefits and limitations.
10
Q7. Write short note on any two of the following 20
(a) Symmetric multiprocessors
(b) Associative memory
(c) Instruction cycle & its sub cycles
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Paper / Subject Code: 55803 / Computer Organisation and Architecture
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This post was last modified on 05 February 2020