Download AKTU B-Tech 3rd Sem 2015-2016 NEC 309 Digital Logic Design Question Paper

Download AKTU (Dr. A.P.J. Abdul Kalam Technical University (AKTU), formerly Uttar Pradesh Technical University (UPTU) B-Tech 3rd Semester (Third Semester) 2015-2016 NEC 309 Digital Logic Design Question Paper

Printed Pages: 4 949 NEC-309
(Following Paper ID and Roll No. to be ?lled in your
? Answer Book)
Paper I 1) : 131305 11011100,
7 - l ? I B.Tech. ,
(SEM. Ill) THEORY EXAMINATION, 2015-16
DIGITALLOGIC DESIGN '
[Time:3 hours] 0 [Total Marks:100]
Section-A
1. Attempt all parts. All parts carry equal marks. Write
? answer of each part in short. (10 X2=20)
(a) De?ne Primitive Flow table.
(b) What is race around condition in JK ?ip ?op?
(c) How many address lines and input output lines are
needed in ZG X8 memory unit.
(d) Differentiate between EPROMand EEPROM.
(6) Design full adder using two halfadders.
18000 - (1) P.T.0.

(f) Differentiate between encoders and decoders.
(g) Subtract l 1010 from 10110 using 2 ?s complement.
(h) Represent (213.25)10 insingle precision ?oating
point representation. .
(i) Cohvert decimal 9 into gray code.
(j) Simplify the Boolean expresion: Y=(A+B) (A+C?)
(B?+C? ).
Section-B
Attempt a_ny ?ve questions from this section.
(10x5=50)
2. Obtain Hamming codeward for the given data:
?11001001010?
3. Design a4-bit by 4-bit Binary Multiplier.
4. Design a 3-bit binary to Gray Code converter using PLA.
5. Explain the difference between SRAm and DRAM.
6. Draw and explain 4-bit Universal shi? Register.
18000 (2) NEC-309
_. ~._V , gum?... ., t
7. Design a clocked sequential circuit that operates
according to the state diagram shown:
Figure: State Diagram
Implement the circuit using D Flip-Flop.
8. Describe the general procedures that must be followed
to ensure a face-free state assignment with example.
9. Obtain the reduced ?ow table for an Asynchronous
sequential circuit that has two inputs x2vand x1 and one
output 2. When x1=0 the output z=0. The ?rst change in
x2 that occurs while x1=l will cause output 2 to be 1.
The output 2 will remain 1 until x1 returns to zero.
13000 (3) P.T.O.

Section-C
Attempt any two questions from this section.15><2=30
10. (a) Implement the following Boolean ?mction with a
multiplexer:
F(A, B, C, D) = 2(0, 2, 5, 7,11,14)
(b) Using a decoder and external gates, design the
combinational circuit de?ned by the following
three Boolean ?mctions:
F1 = (y'+x)z
F 2 = y'z'+yz'
F 3 = (x'+y)z
11. Minimize the following BOolean function using tabular
method (Quine Mc- Cluskey method)
f(A,B,C,D) 2 =m (4,5,6,8,9,10,13) + Z d (0,7,15)
12. A sequential circuit has two JK ?ip-flops Aand B, two
inputs X and Y, and one output Z. The ?ip-?Op input
equations are:
JA=BX+B?Y? KA=B?XY?
JB=A?X KB=A+XY?
Z=AXY+BX?Y?
a) Draw the logic-diagram
b). Derive the state equations.
c) Obtain the state table, state diagram.
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18000 (4) NEC-309