Download DU (University of Delhi) B-Tech (Bachelor of Technology) 6th Semester 2341601 Microprocessors Question Paper
(C)
(d)
(e)
(f)
(g)
01')
(i)
(i)
(k)
(1)
Q2-(a)
(b)
( o)
2w.? 'y.(-? ,,, M . ..
ma?t ,, ., .u? ,1
~ Section A
Q1.(a?) * WhICh is were ef?cient MOV with an offset or LEA ins?tmction? Justify .t
In the reallmb?deg'vdet?e??ihe'the Starting and 'E?dihg address of the memory
segment if .the segment register holds the value
23 5 5H.
What does?fhe?instmction LODSW do?
How many bytes of memory store a far direct jump instruction? What is
Sibred' ineach of the bytes? V
What is wrong with the?f?ihstruction MOV DS, SS?
List the?ag bits tested by the conditional jump instructions.
Differentiate between software and hardware inteHupts.
Evaluate the
What 'is the purpose of the CE pin on a memory device?
Design 'a Contr?l Word for SZC'SS to set Port A as Output Port, Part B as
Input, Po?rt 1n Mode: 1 o?er?tion.
The inStru'e?on MOV [50001-1], BX is used to access a peripheral.
Comment on the kind of peripheral and the?width of its data lines.
Which n?cropr?ooessdr pin'and its status forces it to come out from the wait
state?
Section B
For a CoreZ descriptor that contains a base address of 0 1 OOOOO?OH, a limit
of OFFFFH, hand G=0, what starting and ending locations are addressed by
this des'c?ptor?
Explain with example the instruction LSS BX, [DI].
Which register or registers are used as an offset address for the string
instruction destination in? the microprocessor?
4:.
(21(8)
.(b)
(C)
Q4-(a)
(b)
(0)
QS-(a)
? (b)
( C)
Q6.(a)
(b)
(o)
Q7(a)
(b)
(C)
Identify the addressing mode of each of the following instructions:
(i) MOV AL, [5534H]
(ii) MOV AX, [BX]
(ii) MOV ECX,1_:[SI+BX + ZOOH]
(iii) MOV DX, [EBX + 4*ECX +1000H]
What is the difference between an intersegment and intrasegment jump?
If a near jump uses a signed 16-bit displacement, how can it jump to any
memory location within the current code segment?
What is the difference between register addressing mode and direct
addressing mode?
Explain the instructions XLAT and MOVSX with example.
Describe the operations of PUSHA. Let the current value of be SP=2600H.
What will be the value of SP after the PUSHA instruction is executed?.
Which ?ag bit is tested by the JB instruction?
Explain and sketch the WRITE operation with the help 9f bUS timing cycle.
How is memory interfaicing different for 8086 and 8088 systems?
A 30 MHz crystal is attached to the 8284A clock generator, what is the
operating frequency of the 8086 microprocessor?
Design a decoder circuit to map F6000-F7FFF on 8K x 8 memory.
Write the control word of the 8254 interval timer to configure counter 2 in
mode 2 to count LSB only in BCD.
Write the 8086 instruction/s to read -8 bitdata from the port with address
3250H .
De?ne the term interrupt. Why should an interrupt vector have 4 bytes in
real mode of memory addressing? '
Explain three software commands that are used to control the operation of
the 8237 DMA controller.
How is a hardware interrupt requested?
This post was last modified on 31 January 2020